sdram 代码

its a verilog code for microcoded tb

VHDLVERILOG语言实现的CARDBUS的IP源码,已经实现现场应用-CARDBUS IP CORE

Clock_Dithering_Verilog this is a Clock u_dither, 大家想要做Verilog去抖动的可以参考.-Clock_Dithering_Verilog this is a Clock u_dither, everybody want to make Verilog-jitter can refer to.

使用PWM控制LED亮度的单片机C代码，共计十个亮度。(PWM control of LED brightness microcontroller C code, for a total of ten brightness.)

能够实现16位的SDRAM的读写，没有仿真文件，只有SDRAM读写的源代码，用Verilog编写(can complete read or write sdram， only include Verilog code and no simulation files)

并口通讯代码 并口通讯代码（调试通过） --该代码目前能实现单个字节的收发-Parallel communications code (debugging through)-- The code can now achieve a single byte of Transceivers

DSP 程序的测试 很有用的 仪器上面用的-DSP testing procedures very useful in the above apparatus

利用两个半加器来组成的全加器，是简单的vhdl语言入门-The use of two and a half adder to form the full adder is a simple entry-vhdl language

Vhdl实现计算exp功能 在apex20k上经过验证-Vhdl achieve in terms exp function on proven apex20k

说明：  等精度测频法，有需要的可以下载看看哟，word中包含的代码(Equal Precision Frequency Measurement Method)