RS232RefComp

说明：  运用VHDL描述函数发生器的各个波形，可有构成多功能函数发生器。(VHDL description of the use of various function generator waveforms, can constitute a multi-purpose function generator.)

基于FPGA DE0以及niosII的射频无线发送程序,采用spi接口操作无线模块nrf24l01(To spi interface operation wireless module nrf24l01 of FPGA DE0, as well niosII RF wireless transmitter program)

说明：  this code works with spi and uart interfaces.

papers based on distributed arithmetic.

Cadence的VHDL运算库包，实现求方根，平方你是不是以前不知道怎么弄．哈哈．-Cadence VHDL Operational the package, seeking to achieve root, You are not square did not know how get. Ha ha.

verilog RTL code for simple TCAM

FSK编码器和译码器,有需要的朋友可以看看！(FSK encoder and decoder, there is a need friends can see!)

说明：  这是一个带声音的弹球小游戏，通过VGA口显示，通过扩展口JA的 pin4和 pin GND输出声音， BTN3 BTN2 控制挡板左右移动，弹球和挡板都自带动画效果(This is a band sound pinball game, through the VGA port shows that through the expansion of the mouth of the JA and pin4 output pin GND voice, BTN3 BTN2 control baffle around Mobile, pinball and baffle all bring their own animation effects)

本代码是用VERILOG语言描述的AMI码的解码的程序，经过调试是正确的。代码简单易懂。(This code is described in VERILOG language AMI code decoding process, after debugging is correct. Code is easy to understand.)

LDPC码不同码长对比。码率选择1/2.码长分别为256，512，1024.(LDPC codes of different code length contrast. Bitrate select 1/2 yards long were 256,512,1024.)