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interpolate4
调制信号后4倍内插的verilog代码,用于基带成型滤波器输入数据(4 times after modulation signal interpolation verilog code, used to baseband shaping filter input data)
- 2017-04-20 15:52:09下载
- 积分:1
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signal
能产生正弦波、三角波、方波和e指数衰减的扫频波,且相关参数可调(Can produce sine wave, triangle wave, square wave, and e exponential decay wave sweep and adjustable parameters)
- 2014-05-13 15:15:12下载
- 积分:1
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AD0809芯片DA0832程序实现
芯片ad0809与da0832的实现程序-ad0809 chip with the realization procedures da0832
- 2022-02-04 08:56:35下载
- 积分:1
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数字秒表的VHDL设计,能精确到百分秒,在6位数码管上显示,分别有秒,分,小时,通过目标芯片EPF10KLC84...
数字秒表的VHDL设计,能精确到百分秒,在6位数码管上显示,分别有秒,分,小时,通过目标芯片EPF10KLC84-4验证-VHDL design of digital stopwatch, accurate to the percentage of seconds in the six digital tube display, respectively, have seconds, minutes, hours, through the target chips EPF10KLC84-4 verification
- 2022-07-20 17:58:12下载
- 积分:1
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CAN
说明: ZYNQ中 PS 端 CAN接口的基本使用方法,并通过 CAN接口实现与 PC 端 CA N调试软件之间的数据接收和发送(The basic use method of PS end can interface in zynq, and the data receiving and sending with PC end can debugging software through can interface)
- 2020-04-03 16:41:52下载
- 积分:1
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e2
说明: Any change to the value of Mresults in immediate and phase-continuous changes in the output frequency
- 2014-02-23 02:42:47下载
- 积分:1
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fsk
基于FPGA的fsk调制程序,包括载波的生成,nco的设置(FPGA-based fsk modulation procedures, including carrier generation, nco settings)
- 2016-05-12 21:00:56下载
- 积分:1
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使用CORDIC实现直角坐标的转换,用VHDL乙酰胆碱…
利用cordic实现直角坐标与极坐标的转换,用vhdl实现-use cordic achieve very Cartesian coordinates with the conversion, with vhdl achieve
- 2022-03-25 16:23:25下载
- 积分:1
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3FP
一个三分频verilog模块,可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)
- 2013-08-25 00:41:29下载
- 积分:1
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基于VHDL的I2C程序0004,很不错的论文及程序,,大家快下啊
基于VHDL的I2C程序0004,很不错的论文及程序,,大家快下啊-based on the I2C procedures VHDL 0004, a very good paper and procedures, we quickly under ah
- 2022-02-13 02:05:07下载
- 积分:1