ddr2 controller功能控制,里面有四个模块

SRAM简单测试，测试其性能及其速度，判断SRAM是否可用(Test its performance and speed to determine if SRAM is available)

运用VC编程的带LCD显示的信号发生器可用三个开个调节输出三个波形(Signal generator can be used three to open a regulator output waveform using VC programming with LCD display)

基于fpga的计数器模块 分频 可移植 完美实现(Perfect realization of frequency division and portability of counter module based on FPGA)

说明：  FPGA实现PLL锁相环，输出不同频率的时钟控制信号。(FPGA realizes PLL and outputs clock control signals of different frequencies.)

UART的完整发送程序，包括完整的工程核源代码。-UART to send the complete procedure, including the complete source code of nuclear engineering.

这个是用verilog语言编写的基于FPGA的交通灯控制器，分别控制四个方向上的交通灯的通断-The verilog language is FPGA-based traffic light controller, respectively, the four direction control of traffic lights-off

学习xilinxVHDL语言的一本好书，为官方资料，可方便读者熟悉xilinx的代码风格(A good VHDL,it s fittable for the reader to be familiar with the style of xilinx)

Altium Reference design for LMH0340 test bed and design

说明：  实现串口通讯以及SLIP协议传输数据，增加了特殊字符的转义(Realization of Serial Communication and SLIP Protocol)

FPGA SPI 主要模块全部涵盖 时序解释 与DSP通信(FPGA SPI Timing interpretation covering all main modules communicate with the DSP)