degilent atlys board ucf

USB转RS232RSTTLRS485FT232+SP213串口的原理图AD画的(USB to RS232RSTTLRS485FT232+SP213 serial port schematic AD drawing)

verilog da0832 cpldfpga control-verilog da0832 cpldfpga control

基于FPGA的门级逻辑实现快速乘法运算的verilog源程序。-FPGA-based gate-level logic implementation of rapid multiplication of the verilog source.

FSK/MSK/GFSK/GMSK DIGITAL DEMODULATOR VHDL SOURCE CODE OVERVIEW

MBD-FPGA数字滤波器设计基本流程,基于DSP builder(MBD-FPGA basic process of digital filter design)

用Verilog语言实现的FPGA UART独立收发模块 思路简单，代码简洁。在Lattice LFE3EA VERSA开发板上验证通过,编译器Lattice Diamond. 功能：串口收到数据后立即回传，此后每一秒串口数据+1再发送。(Using Verilog language independent of FPGA UART transceiver idea is simple, concise code. Development board in Lattice LFE3EA VERSA verified by the compiler Lattice Diamond. Features: Serial data is received immediately after the return, then every second serial port and then send the data+ 1.)

可直接用于zedboard上的串口通信，利用zynq7000的pl部分实现一个简单的UART串口通信(Can be used directly on the zedboard serial communication, the use of zynq7000 PL part of the realization of a simple UART serial communication)

基于VHDL实现（7，4）汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)

simple code based on verilog shifter , cla ,clg , ALU ,PC, decoder , tb_top

实现十六位加法器，是书籍上配套的应该可用-This is an 16 bit adder using vhdl