登录
首页 » VHDL » 眼电图形刺激器设计

眼电图形刺激器设计

于 2022-01-22 发布 文件大小:319.47 kB
0 184
下载积分: 2 下载次数: 1

代码说明:

完成黑白全屏半屏棋盘格、红绿全屏半屏竖条栅、蓝绿全屏半屏横条栅六种图形格式之间的循环转换,用FPGA实现VGA显示。 设计方案的顶层文件需有几个模块构成:锁相环模块,分频定时模块,时序控制模块和显示模块。每个模块首先用VHDL语言 完成实现并仿真,再生成模块放在顶层的block文件中。锁相环模块作用是把硬件实验板的50MHz转换为适用于VGA800*600 的40MHz时钟;定时模块定时5秒,每5秒转换一种图形显示方式;时序控制模块用于扫描及消隐,使能够正常显示;显示模块 用于显示。各模块正确连线、定义引脚和仿真后,可以下载到FPGA中,连接显示器来显示,六种图形方案每5秒转换,循环。

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 程序
    传感器是一种检测装置,能感受到被测量的信息,并能将感受到的信息,按一定规律变换成为电信号或其他所需形式的信息输出,以满足信息的传输、处理、存储、显示、记录和控制等要求(Sensor is a kind of detection device, which can sense the measured information and transform it into electrical signal or other required information output according to certain rules to meet the requirements of information transmission, processing, storage, display, recording and control.)
    2020-06-18 22:00:01下载
    积分:1
  • 5408A
    The SPFD5408A, a 262144-color System-on-Chip (SoC) driver LSI designed for small and medium sizes of TFT LCD display, is capable of supporting up to 240xRGBx320 in resolution which can be achieved by the designated RAM for graphic data. The 720-channel source driver has true 6-bit resolution, which (The SPFD5408A, a 262144-color System-on-Chip (SoC) driver LSI designed for small and medium sizes of TFT LCD display, is capable of supporting up to 240xRGBx320 in resolution which can be achieved by the designated RAM for graphic data. The )
    2012-07-16 17:09:15下载
    积分:1
  • mybch1
    说明:  实现(7,4)BCH码的编码和译码。已知生成矩阵和校验矩阵,通过c=m*G进行编码,译码时利用伴随式译码。s=c*H‘,求得伴随式,对应的错误图样找到错误位置,对错误位置进行更正,得到译码结果。(Coding and decoding of (7,4) BCH Codes)
    2021-04-27 17:28:44下载
    积分:1
  • mp3_player
    Altera board Mp3 project
    2011-12-27 15:04:02下载
    积分:1
  • 基于FPGA的电子密码锁的设计,内有Verilog HDL源码和各仿真图像
    基于FPGA的电子密码锁的设计,内有Verilog HDL源码和各仿真图像-FPGA-based design of electronic locks, which have Verilog HDL source code and the simulation image
    2022-01-26 01:04:10下载
    积分:1
  • jiaotongdeng
    运用VHDL语言编写的交通灯实现程序,能模拟十字路口的交通灯控制(VHDL language using traffic lights to achieve program can simulate the traffic light controlled crossroads)
    2011-06-06 16:26:55下载
    积分:1
  • MATLABABCv2
    The aim of the ECG simulator is to produce the typical ECG waveforms of different leads and as many arrhythmias as possible. My ECG simulator is a matlab based simulator and is able to produce normal lead II ECG waveform.
    2017-08-21 21:31:42下载
    积分:1
  • UART串口传输的Verilog RTL
    uart串口传输的verilog RTL级源码,已通过仿真验证。文件主要包含发送、接受位处理,发送、接受字节帧处理,对学习串口通信的朋友很有帮助-uart serial transmission verilog RTL-level source code has been verified by simulation. File mainly contains the send, receive digital processing, sending, receiving bytes of frame processing, serial communications, a friend of learning helps
    2022-01-28 20:31:09下载
    积分:1
  • CPLD drives with digital control, of from 0000 to 9999, digital control is a dyn...
    用CPLD驱动数码管,实现从0000计到9999,数码管是用动态显示,程序用VERILOG完成的-CPLD drives with digital control, of from 0000 to 9999, digital control is a dynamic display, the program completed with VERILOG
    2022-05-23 09:34:50下载
    积分:1
  • 微波炉定时器集成电路的设计 1、 控制状态机:工作状态状态转换。 2、 数据装入电路:根据控制信号选择定时时间、测试数据或完成信号的装入。 3、...
    微波炉定时器集成电路的设计 1、 控制状态机:工作状态状态转换。 2、 数据装入电路:根据控制信号选择定时时间、测试数据或完成信号的装入。 3、 定时器电路:负责完成烹调过程中的时间递减计数和数据译码供给七段数码显示,同时还可以提供烹调完成时间的状态信号供控制状态机产生完成信号。 -microwave timer IC design a control state machine : state of the state conversion work. 2, data loading circuit : According to choose control signal timing, or the completion of the test data signal load. 3, timer circuit : responsible for the completion of the cooking process of counting and time decreasing supply data decoding digital paragraph 107, while cooking can also provide time to complete state control signal for the state machine generated signals.
    2022-04-02 09:49:26下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载