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DE0_VGA
利用FPGA设计游戏设计,真人版超级玛丽,VGA显示(Using FPGA design game design, live-action version of Super Mario, VGA display)
- 2020-11-06 13:09:55下载
- 积分:1
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Altera_Audio
针对Altera的DE2/ DE1交互板的音频核心的音频编解码器(编码器/解码器),并提供了音频输入和输出的接口。(The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1
Boards and provides an interface for audio input and output.)
- 2015-04-01 22:21:49下载
- 积分:1
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can_latest.tar
用verilog编写的can总线控制器,包括设计参考历程和仿真程序,以及开发文档!(Written by verilog can bus controller, including the design reference course and simulation program, and the development of the document!)
- 2015-07-23 19:55:03下载
- 积分:1
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clock_6
说明: ds1302时钟驱动程序,已在quartus上验证可以是直接使用(DS1302 clock driver, which has been verified on quartus, can be used directly)
- 2020-06-24 12:00:02下载
- 积分:1
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EDA
EDA-Verilog 编码原则,初学者必看!-EDA-Verilog coding principles, beginners must-see!
- 2022-02-20 01:38:26下载
- 积分:1
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dct
基于FPGA的图像压缩算法程序,自己写的,可以参考一下(FPGA-based image compression algorithm, write your own, you can refer to)
- 2011-10-23 00:54:17下载
- 积分:1
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1、 利用FLEX10的片内RAM资源,根据DDS原理,设计产生正弦信号的各功能模块和顶层原理图; 2、 利用实验板上的TLC7259转换器,将1中得到的正弦信...
1、 利用FLEX10的片内RAM资源,根据DDS原理,设计产生正弦信号的各功能模块和顶层原理图; 2、 利用实验板上的TLC7259转换器,将1中得到的正弦信号,通过D/A转换,通过ME5534滤波后在示波器上观察; 3、 输出波形要求: 在输入时钟频率为16KHz时,输出正弦波分辨率达到1Hz; 在输入时钟频率为4MHz时,输出正弦波分辨率达到256Hz; 4、 通过RS232C通信,实现FPGA和PC机之间串行通信,从而实现用PC机改变频率控制字,实现对输出正弦波频率的控制。-a use FLEX10-chip RAM resources, in accordance with DDS principle, design sinusoidal signal generated by the top-level functional modules and schematics; 2, the experimental board TLC7259 converters, will be a sinusoidal signal, the D/A conversion, after filtering through the ME5534 oscilloscope observation; 3, the output waveform requirements : the input clock frequency of 16KHz, sine wave output resolution of 1Hz; the input clock frequency of 4MHz, the sine wave output resolution of 256Hz; 4, RS232C communications, FPGA and PC serial communications between in order to achieve PC-frequency control characters, the realization of sine wave output frequency control.
- 2022-01-25 19:12:14下载
- 积分:1
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这是一本介绍FPGA设计过程中关键问题的资料书,对参加面试或工程设计有一定帮助
这是一本介绍FPGA设计过程中关键问题的资料书,对参加面试或工程设计有一定帮助-This is an FPGA design process, introduce the key issues of information written on the interview or take part in engineering design has a certain extent, help
- 2023-07-26 21:05:03下载
- 积分:1
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VGA altera detailed description of the official routine Verilog code for a very...
详细介绍了VGA官方例程Verilog代码,非常好很实用
- 2022-08-21 17:43:09下载
- 积分:1
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用可编程逻辑器件实现PWM波形即PWM波形发生器
用可编程逻辑器件实现PWM波形即PWM波形发生器-Using programmable logic devices that realize PWM waveform PWM Waveform Generator
- 2022-07-21 11:20:43下载
- 积分:1