CPLD总线Verilog HDL代码，PLD

EKG SIGNAL PROCESSING THROUGH CORDIC

用Verilog实现的交通信号灯控制，主干道和支路通行的时间不相等(Using Verilog implementation of traffic signal control, the trunk road and the slip is not the same passage of time)

sparc org, vhdl rtl code

至于FSK调制原理就不多说了，这里做的一个实验是二进制频移键控。发送一组码元，通过响应的键控电路监测是发1还是发0然后选择频率控制正余弦电路波形。-see

This is the update firmware for CVFX-C02, 7" motorized touch screen car dvd player gps

rs422标准通讯模块 异步收发 verilog语言编写(rs422 standard communication module asynchronous receiver verilog language)

一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)

介绍了FPGA设计的十大准则，对初学者很有用，对于工作多年的同志，也会有整理总结的好处(Describes the FPGA design of the top ten criteria are useful for beginners, for many years comrades, there will be finishing the benefits of the summary)

ＶＨＤＬ编写的flash控制器源代码.包含testbench。-Prepared by flash controller VHDL source code. Contains testbench.

UART模块的VHDL语言设计(Design of VHDL language based on UART module)