Verilog module containing a synthesizable CRC function //* polynomial: (0 1 8)...

msk比特误码率matlab仿真 匹配滤波器(the msk bit error rate matlab simulation matched filter)

用Vrilog产生一个混沌信号，并用MATLAB仿真，画出波形。(With Vrilog generate a chaotic signal simulation using MATLAB, draw the waveform.)

rs编码vvhdl 希望能通过 我不晓得具体对大家有用否 希望懂rs编码的多多交流 -rs coding vvhdl I do not want to be able to know the specific useful whether you want to understand a lot of coding rs exchange

说明：  该源代码包是AHB总线到Wishbone总线的交接器，包括以下4个部分：RTL源代码，测试平台，软件测试程序，说明文档。(This source package is the AHB bus to Wishbone bus bridge(wrapper).It has the following 4 parts: RTL codes, testbench, software simulating files, help documents.)

EP2C5T144 驱动 LCD1602液晶(LCD1602 LCD driver EP2C5T144)

BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)

NN CONTROLLER FOR UPQC

实现QR_RLS算法,基于fpga 的非线性功放的dpd实现(realize QR_RLS)

一个FPGA的AVR_Core 仅供测试~-AVR_Core an FPGA-only test ~

16X2液晶显示屏的FPGA显示驱动设计。-16x2 LCD display driver design of the FPGA.