realization of the project document ARM system CPLD logic, external resources ha...

turbo码的verilog程序，有意者请下载。(turbo code verilog procedures Interested parties please download.)

文件名：lcd1602lib.h 内　容：1602液晶的控制端口、数据端口和相关操作(The file name: lcd1602lib. H * inside let: 1602 LCD control port, data port and related operations )

这是可编程逻辑器件（CPLD）初学者的入门级文章，仅供参考。-This is the programmable logic device (CPLD), the entry-level beginners articles for reference purposes only.

说明：  是用VHDL语言编写的乐曲演奏程序，详细的写了各个模块的子程序(VHDL language is the music playing program)

48阶FIR滤波器的verilog，包含测试文件(48-order FIR filter verilog, including test paper)

VHDL 波形防止抖动程序,学习试验材料(VHDL prevent jitter waveform procedures, the pilot study materials)

利用拨码开关控制液晶显示器进行十进制数字显示。(DIP switches control the use of liquid crystal display to decimal figures.)

H.265的FPGA实现！！使用Verilog语言开发。(H.265 FPGA implementation! Developed using Verilog language.)

Simulation and Synthesis Techniques for Asynchronous FIFO Design

practical_lift_controller 实用电梯控制器 实用电梯控制系统block symbol file 实用电梯控制器的Verilog HDL程设计-practical utility practical_lift_controller elevator controller elevator control system block symbol file utility elevator controller Verilog HDL-way design