基于FPGA的1553B总线编码解码器的设计

本程序实现不同频率时钟的产生及其相互转化-this program different clock frequencies to the formation and transformation

AHB to Wishbone memory interface VHDL source code

用verilog语言实现加密芯片DS28E01的调用操作命令。(Using Verilog language to achieve the encryption chip DS28E01 call operation commands.)

This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.

generate sine wave. Inputs : Amplitude, phasein, frequency

简易数字存储示波器verilog源代码 经过EP2C8Q208C8验证(Simple digital storage oscilloscope verilog source code has been verified EP2C8Q208C8)

一个简单的UART串口程序，能实现数据的发送与接收，但没有奇偶校验等验证数据传输是否正确。(A simple UART serial program, can send and receive data, but there is no parity and other validation data is correct.)

EMP3064的开发板板，原理图，verilog例子，板子说明，规格书，全套资料(EMP3064 development board, schematics, Verilog examples, board instructions, specifications, a full set of information)

OFDM通信系统设计与仿真(shuoshilunwen)(OFDM System Design and Simulation )

利用c控制adc，主要是控制字写入，状态控制。-C control the use of adc, is mainly controlled write, the state of control.