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这是关于赢vhdl语言变得信号采集卡,很有实用性,大家可以来看看的。...
这是关于赢vhdl语言变得信号采集卡,很有实用性,大家可以来看看的。-This is about winning VHDL language has become signal acquisition card, is very practical, we can take a look at the.
- 2022-08-10 10:21:25下载
- 积分:1
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c语言编写51单片机键盘扫描程序,方便移植到其他的硬件上去...
c语言编写51单片机键盘扫描程序,方便移植到其他的硬件上去-51 Singlechip c language keyboard scanning procedures for transplantation to other hardware up
- 2023-09-08 23:40:03下载
- 积分:1
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BISS-B---Stimulate_OK
BISS-B 源代码。包含传感器模式和寄存器模式(BISS-B source code. Includes sensor mode and register mode)
- 2021-03-15 19:29:22下载
- 积分:1
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facman
一款在Verilog实现的吃豆人游戏,采用VGA接口,在Nexys3开发板上运行无误。(A pac-man game implemented via Verilog, using VGA interface, perfectly run on Nexys 3)
- 2021-03-31 07:39:09下载
- 积分:1
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sourceinsight的verilog插件
sourceinsight的verilog插件-The Verilog sourceinsight plug-ins
- 2022-02-04 18:20:59下载
- 积分:1
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- 2022-01-25 14:18:53下载
- 积分:1
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8253
8253可编程定时器/计数器芯片 VeriLog实现(8253 programmable timer/counter chip VeriLog achieve)
- 2013-05-31 20:40:23下载
- 积分:1
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异步FIFO
自己编写的同步和异步FIFO的verilog代码,验证过,有可靠性(Verilog code of my own synchronous and asynchronous FIFO, verified,and reliable.)
- 2020-07-03 07:00:02下载
- 积分:1
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使用VHDL语言编程,烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟...
使用VHDL语言编程,烧录在芯片运行的倒数5秒响4声短铃最后一声长音的数字钟-The use of VHDL language programming, burn in the chip to run the last 5 seconds short bell ring 4 final say sound a long tone of digital clock
- 2022-06-20 16:23:08下载
- 积分:1
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verilogexample
verilog学习资料。附带简单的源代码列子,可以直接使用和仿真。(verilog learning materials. Source code with a simple Lie Zi, and simulation can be used directly.)
- 2011-05-26 11:53:24下载
- 积分:1