8位乘法器的VHDL代码

一篇比较好的spi接口的vhdl实现的参考-A relatively good spi interface realize VHDL reference

四位除法器的VHDL源程序-four division of VHDL source

说明：  Giao tiep Univesan ...

直接序列扩频通信（主要包括BPSK调制和BPSK解调以及PN码的产生）(Direct sequence spread spectrum communication (including BPSK BPSK modulation and demodulation, and the PN code generation))

改程序将实现对两个信号的曼切斯特编码，以用仿真软件验证过了(Reform program will achieve two Manchester encoded signal to a validated using simulation software)

verilog，FPGA的TDC电路设计(verilog ，TDC base on FPGA)

实现大型LED屏显示的CPLD程序，对FPGA学习很有帮助-To achieve large-scale LED screen display of the CPLD program, very helpful for learning FPGA

lehmer random number generator method to generate test patterns of circuit

在FPGA上实现CAN总线SPI接口通信，使用Verilog语言(Realize SPI interface communication of CAN bus on FPGA, using Verilog language)

8位并行转穿行发送程序，波特率可自行设置，经检验有实用效果(8-bit parallel transfer walk through the sending program, the baud rate can be set up their own practical effect inspection)