FPGA TRACKING SYS

说明：  agilex fpga description

Any change to the value of Mresults in immediate and phase-continuous changes in the output frequency

如果不考虑占空比，直接利用计数器来进行分频，则占空比会发生变化。下面程序实现1：1的三分频。-if not duty cycle directly counter to the use of sub-frequency, duty cycle will change. Below a program : a third of the frequency.

说明：  FPGA实现基带成型滤波器，升余弦滚降系数，多进制调制(FPGA)

说明：  jesd204b接收部分程序和带仿真历程(Jesd204b receiving part program and simulation process)

8051核的vhdl原代码。-8051 core VHDL source code.

Building the CPU datapath

基于PCF8591数模转换和DDS技术的信号发生器系统设计(Design of Signal Generator System Based on PCF8591 Digital-to-Analog Conversion and DDS Technology)

这是一个讲究的的 介绍VB在犀牛软件里的 很好的东西 你会满意的 相信我(you will be glad)

在quartus下搭建的数字锁相环，能实现频率自动跟踪。(The digital phase-locked loop built under quartus can realize automatic frequency tracking.)