vhdl的仿真 quartus 2的flv视频

用汇编语言设计的频率计，注释较详细，适于初学者学习使用(Assembly language design frequency meter, the comment in more detail, suitable for beginners to learn to use)

URAT 部分VHDL源码 大家多多支持 哈哈 -VHDL source URAT part of U.S. support of Haha

用状态机实现密码锁State machine used to achieve code lock-State machine used to achieve code lock

说明：  Verilog经典实例.包括洗衣机红路灯、兹自动方麦基、等式子可用(Classic examples of Verilog. Including red street lights for washing machines, ZAM, equation availability)

通过代码控制音频编/解码硬件芯片WM8731， 通过按键控制音频输出的音量(Audio codec hardware chip WM8731 is controlled by code, and audio output volume is controlled by keys.)

JOP的内核缓存源码，不易找到，大家一定要顶啊-JOP kernel source code cache, not easy to find, we must kits

内插成型滤波器的FPGA实现，可根据需要配置不同的内插倍数，Quarter II环境编译，可直接使用(Interpolation shaping filter FPGA, can be equipped with different interpolation factor, Quarter II compiler environment, can be used directly)

基于Basy3的贪吃蛇小游戏，实现了相关功能。(Snake Eating Game Based on Basy3)

基于FPGA用verilog语言实现16点FFT(16-point FFT FPGA-based verilog language)

一个用Verilog编写的编帧、解帧及码速匹配的程序，相当经典(Verilog prepared with a series of frames, frames and solutions yards speed matching procedures, rather classic!)