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VHDL编程语言设计,显示灯,显示VHDL字样。
VHDL编程语言设计,显示灯,显示VHDL字样。-VHDL programming language design, indicator lights, indicating the word VHDL.
- 2022-06-28 14:26:29下载
- 积分:1
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Cordic_matlab
实现自然对数运算的cordic算法的matlab浮点仿真,以及针对FPGA硬件平台的定点仿真测试(Achieve natural logarithm of cordic algorithm matlab floating point emulation, and FPGA hardware platform for fixed-point simulation testing)
- 2013-11-01 15:10:09下载
- 积分:1
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实战训练30 数码管动态扫描
说明: fpga版本的数码管动态扫描程序,可供学习(FPGA version of the digital tube dynamic scanning program for learning)
- 2020-06-26 13:20:01下载
- 积分:1
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ClockSync
基于COMTEX-M3的IEEE1588,irigB对时的源程序,包括GPS对时程序,并将对时的结果写入FPGA中(Based COMTEX-M3 of IEEE1588, irigB on time source, including GPS for the program, and writes the results when the FPGA)
- 2015-05-12 15:11:03下载
- 积分:1
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RS
通过verilog hdl语言实现RS编码器与译码器的设计(Verilog hdl language through the RS encoder and decoder design)
- 2021-04-28 15:48:44下载
- 积分:1
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Copy-of-DIGITAL-VLSI-DESIGN
a manual for design implementation of fpga and ASIC using verilog
- 2012-09-04 17:34:58下载
- 积分:1
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- 2023-04-14 01:30:04下载
- 积分:1
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8位大小比较器的VHDL源代码,Magnitude Comparator
VHDL description of a 4...
8位大小比较器的VHDL源代码,Magnitude Comparator
VHDL description of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion
- 2023-07-28 13:55:03下载
- 积分:1
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coreahblite代码
amba ahblite总线时序转并口时序,可访问sram/flash/mram,适用于smartfusion2系统,arm内核对外进行数据访问。
- 2023-08-27 04:00:03下载
- 积分:1
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VHDLaVerilogcomplie(20151022105744)
一个关于VERILOG与VHDL混合编程,混合验证的资料(A hybrid programming on VERILOG and VHDL, mixed verification data)
- 2015-12-14 17:19:26下载
- 积分:1