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shumagua
通过数码管和单片机的组合 制作成的数码管时钟程序(Through the combination of digital control and made into a single-chip digital clock program)
- 2013-10-27 12:30:04下载
- 积分:1
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Verilog code to calculate Sobel
Verilog code to calculate Sobel
- 2022-03-24 08:25:30下载
- 积分:1
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XILINX FPGA on internal training materials in Chinese
关于XILINX FPGA
内部
中文培训教材-XILINX FPGA on internal training materials in Chinese
- 2022-05-22 03:01:00下载
- 积分:1
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加法器
说明: 4位加法器,4位数字相加及进位功能的实现,主要利用Verilog语言实现,简单轻松,且代码量少(a adder which can realize 4 bit numbers adding)
- 2020-10-31 11:05:41下载
- 积分:1
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自己编的VHDL的波形发生器 做信号的可以
自己编的VHDL的波形发生器 做信号的可以-BOXING
- 2022-05-27 22:47:53下载
- 积分:1
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ad9983的检测视频信号的code及其project 用的是xilinx 的virtex4 但不包括I2C...
ad9983的检测视频信号的code及其project 用的是xilinx 的virtex4 但不包括I2C-ad9983 test video signal code and the project using a xilinx the virtex4 but does not include I2C
- 2022-03-17 20:04:49下载
- 积分:1
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verilog_DATA_displays
使用verilog语言,滚动显示“verilog”字符串程序代码及相关说明(Using verilog language, scrolling display " verilog" string code and instructions)
- 2014-01-16 10:49:55下载
- 积分:1
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decodeLogDomainSimple
When the initial input falls between the Switch off point and Switch on point values, the initial output is the value when the relay is off.
- 2017-01-29 18:04:53下载
- 积分:1
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ag-overview
说明: agilex fpga description
- 2019-05-13 18:21:04下载
- 积分:1
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ask调制,基于VHDL仿真平台,解调同样给出,此程序经过验证
ask调制,基于VHDL仿真平台,解调同样给出,此程序经过验证-ask modulation, based on VHDL simulation platform, demodulator is the same, this procedure proven
- 2022-02-07 06:59:29下载
- 积分:1