VHDL源文件

Inroduce the LEON 2 microprocessor

The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.

E1成帧器和解帧器的FPGA实现源码，测试可用(E1 Framer deframer)

VGA controller : Genarate a VGA signal from your inout information as color info of each pixel

FPGA与DSP的EMIFA口接口程序.在FPGA内分配了两块双BUFFER与DSP进行通信.-FPGA and DSP EMIFA mouth interface program. The FPGA distribution within the two-SUBJECT ER and DSP communication.

关于LDPC解码的verilog程序，包含设计代码和验证环境(LDPC decoding on verilog procedures, including the design code and verification environment)

一个时钟程序，还有跑表，感觉相当不错的，有需要就下载吧-A clock procedures, as well as stopwatch, I feel pretty good, there is a need to download it

一种学习用的小程序，主要用与VHDL仿真的全加器的一段代码！大家可以下载进行修改于仿写-A learning to use a small program, mainly used with the VHDL simulation of a full-adder code! You can download the modified Yu Fang Xie

PPM编码器的测试文件，可以测试PPM编码是否正确(PPM encoder test file, you can test whether the correct PPM encoding)

主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)