篮球24秒可控计时器设计

8位crc的verilog设计 通过仿真综合验证并已应用在工程里面 (verilog of 8bit error checkout )

In this case is a QPSK algorithm code for mapping the interleaved code, using VHDL language. This code provide the method of mapping the code by using QPSK algorithm.

说明：  实现基于黑金开发板的实时时钟功能，显示时分秒(Realize the real-time clock function based on black gold development board, display time, minute and second)

等精度频率计的verilogHDL的实现,我花了好长时间才写的哦

VHDL Handbook by HARDI Electronics AB

verilog 或门程序 初学者必备。。。。。。。。。。。。(verilog )

用于实现上位机与下位机之间通过RS232协议来进行通讯。(It is used to realize communication between upper computer and lower computer through RS232 protocol.)

this is bpsk code in matlab

VHDL黄金参考手册，能让你更好的学习了解VHDL语言(VHDL gold reference manual, can make you a better learn VHDL language)

说明：  用于生成adams或recurdyn所需的路面不平度，用于悬架或其他的仿真(Adams or recurdyn used to generate the required road roughness for suspension or other simulation)