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add1A
用于实现锁相光子计数技术的累加器,verilog语言(Accumulator achieve specific cases for accumulator lock detection of photon counting technique)
- 2016-04-09 11:13:25下载
- 积分:1
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verilog-digital-system-design-
verilog数字系统设计,一本很好的verilog学习的书籍,很适合初学者(verilog digital system design, a good verilog learning books, it is suitable for beginners)
- 2021-01-10 20:28:50下载
- 积分:1
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VHDL-Keyboard
设计制作一个检测4*4矩阵键盘的按键编码的实验,把实际按键的键值的八位编码先转换成从0000—1111的编码,再译成数码管能识别的八位编码,在数码管动态显示时,4*4矩阵键盘的第一行对应00—03,第二行对应04—07,第三行08—11,第四行对应12—15。(Design a 4* 4 matrix keyboard key coding experiments to detect the key the actual key octet coded first convert from 0000-1111 encoding, and then translated into digital tube to identify the eight coding, digital tube dynamic display, the first line of the 4* 4 matrix keyboard corresponding to 00-03, the second line corresponds to 04-07, the third line of 08-11, the fourth line corresponds to 12-15.)
- 2012-07-01 10:02:33下载
- 积分:1
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alu
说明: 用Verilog编写的简单的运算单元(ALU),可实现加、减、与、或、异或、非、左、右移等功能(Verilog prepared with simple arithmetic unit (ALU), can be add, subtract, and, or, exclusive-OR, non-, left, and other functions shifted to right)
- 2009-07-28 16:20:52下载
- 积分:1
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paidui
排队电路设计,适用于EDA大作业,大学生适合使用,初学者,仅仅是vhdl的语言,可以借鉴(Queuing circuit design, suitable for EDA operation, college students suitable for use, beginners, only the language of VHDL, can learn from)
- 2017-12-10 23:47:23下载
- 积分:1
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sync-and-asyn_FIFO_verilog
同步与异步FIFO的verilog实现,包括源代码,testbench,测试以及综合通过,还有相关参考资料(Synchronous and asynchronous FIFO verilog achieve, including source code, testbench, test and integrated through, as well as related references)
- 2021-03-07 14:19:29下载
- 积分:1
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RS_coder
基于verilog的RS编码器 绝对实用(Based on the RS encoder verilog absolute utility)
- 2010-12-07 20:51:02下载
- 积分:1
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23565785scan_led
Quartus环境下的7段扫描显示电路的源程序(Quartus environment of the seven scanning display circuit of the source)
- 2006-12-11 17:11:41下载
- 积分:1
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mun_base
adfvff f fdfs f dvdsz dz vdzsvd hdfdgvaz
- 2019-03-28 07:33:03下载
- 积分:1
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serial_adder
串行加法器的vhdl描述,用两个移位寄存器和一个全加器,一个d触发器实现(The VHDL description of the serial adder, with two shift registers and a full adder, a D trigger)
- 2020-11-10 21:19:46下载
- 积分:1