16个VHDL 编程实例

用VHDL语言编写的LDPC码硬件实现语言，相对于verilog的，比较简单-Using VHDL language LDPC code hardware implementation language, compared to Verilog, and relatively simple

图形图像H264插值算法，应用于图像视频处理(H264 graphic image interpolation algorithm is applied to image video processing)

说明：  卫星信道模拟器能够模拟卫星信道的传播特性，用于设备的通信调试，节 约研发成本。目前，很多卫星信道模拟器在参数设置上存在问题：有的参数难 以调节；有的采用上位机进行参数设置，通过上位机设置参数需要连接电脑， 适应性差。针对上述问题提出了一种基于FPGA可触控卫星信道模拟器，FPGA 作为算法实现和控制单元，通过控制触摸屏方便快捷的实现参数设置。(Literature of Satellite Channel Simulation Based on FPGA)

存储示波器，功能齐全通过验证，毕业设计用-Storage oscilloscope, a full-featured validated, graduation design

VHDL语言写的频率计的程序，内带完整的技术报告-VHDL write the frequency of procedures, brought integrity of the technical report

说明：  fPGA中的竞争冒险现象的来源及其解决方法(FPGA in the source of the phenomenon of competitive risk-taking and their solutions)

用Verilog描述了一款简单逻辑芯片74HC595的功能该芯片功能为：带输出锁存的8位移位寄存器(use the verilog to describe a simple chip 74HC595 with 8-Bit Serial-In, Parallel-Out Shift Reg and High-Current 3-State Outputs Reg)

实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through

有用的数字钟设计文档，有秒表、闹钟等模块，希望对大家有用！(JUST LEARN FROM IT!!ENJOY!)

四选一选择器,输入四个,输出1个.当NM=00时选A 当NM=01时选B 当NM=10时选C 当NM=11时选D-four elected a selector, the importation of four, Output 1. When NM = 00 A at the election when NM = 01 am when the election NM B = C 10:00 when the election NM = 11:00 election D