8051 VHDL核心，内有说明，很详细，值得下载…

UDP / IP上的Spartan3E以太网通信通过斯巴达3E发送UDP数据包到/从我的电脑。

原理图输入法制作的32位加法器。。。。。。。。(adder32)

可以实现对任意波形分任意频，分频加减通过按键实现。-Can be achieved for any arbitrary waveform at frequency, frequency addition and subtraction through the keys to achieve.

用Verilog实现FSK调制，调用IP核实现正弦余弦的调制-Verilog implementation using FSK modulation, called IP core to achieve the modulation sine cosine

等精度测试频率计，包括程序源代码以及相关注释-Precision test frequency meter, etc., including source code and related comments ......

波形发生器，带TESTBENCH， 多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn -waveform generator, with TESTBENCH. Multi-platform-- the design makes use of the new shift opera tors available in the VHDL-93 std-- this design passes the Synplify synthesis check-- downloa d from : www.fpga.com.cn

基于FPGA的多电平载波移相SPWM方法实现(theCarried-Phase-shift SPWM method of Multi-Level converter based on FPGA)

在实现 OFDM 中，必须有筛选器，以提高无线电信号的质量。一般情况下，筛选器应用于 OFDM 的类型是 FIR 滤波器。FIR 滤波器是方便使用，因为线性相位的未来。所以，我研究它与实现 FIR 滤波器 VHDL 语言一轮。这段代码是完全测试。但我是节约资源的 FPGA 改进范围。

一个用于锁相环开发的资料，请作为参考！-A phase-locked loop for the development of the information, please as a reference!

说明：  使用FPGA实现sobel边缘检测的图像处理算法，更改后可直接使用在自己的系统上。(FPGA is used to implement the image processing algorithm of Sobel edge detection, which can be directly used in its own system after change.)