高速FIFO，verilog设计。速度高达130Mhz

说明：  A low pass filter module based on FPGA, easy to transplant

浮点数运算的FPGA实现，包括仿真文件。(FPGA realization of floating-point operations, including the simulation file)

说明：  asssembly ccode to turn on 7 segmen

第7章数字系统设计实例 7.1 半整数分频器的设计 7.2 音乐发生器 7.3 2FSK/2PSK信号产生器 7.4 实用多功能电子表 7.5 交通灯控制器 7.6 数字频率计-Chapter 7 Digital System Design Example 7.1-integer dividers designed Music Generator 7.2 7.3 2F SK/2PSK Signal Generator 7.4 Table practical multi-function electronic traffic signal controllers 7.5 7.6 Digital Cymometer

it s vhdl program for decoder

protel经典教程，并附有一张电路设计原理图(protel classic tutorials, together with a circuit design schematic)

ACO-OFDM sdakldjas seuekdsjakdnskd

LCD例程 altera官方Verilog代码 详尽简单实用-LCD routines altera official Verilog code is simple and practical details

说明：  iic总线挂接在amba的apb总线上，标准接口，verilog代码的实现(iic bus attached to the amba' s apb bus, standard interfaces, verilog code implementation)

agilex fpga description