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wallace_multiplier
华莱士树乘法器,运用了华莱士树状结构和布斯算法,提高了速度(The Wallace tree multiplier uses the Wallace tree structure and the Buss algorithm to increase speed)
- 2020-12-26 10:29:03下载
- 积分:1
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DE2_SD_Card_Audio
FPGA开发,DE2开发板上实现,从SD卡读出MP3文件并播放,(即是开发一个简单的MP3播放器)(FPGA development, DE2 development board realize, from the SD card to read out and play MP3 files, (that is, the development of a simple MP3 player))
- 2020-11-28 21:49:28下载
- 积分:1
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跑马灯led_horse vhdl cpldfpga
跑马灯led_horse vhdl cpldfpga-led_horse vhdl cpldfpga
- 2022-12-03 00:40:03下载
- 积分:1
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MP3-coder
In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder.
Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them
includes all the VHDL source codes of the component.)
- 2013-08-06 15:40:24下载
- 积分:1
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浮点数运算的FPGA实现,包括仿真文件。
浮点数运算的FPGA实现,包括仿真文件。-FPGA realization of floating-point operations, including the simulation file
- 2022-07-18 19:56:21下载
- 积分:1
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e_BIU
isa MEMORY PLAN eu biu asm
- 2020-06-25 19:20:02下载
- 积分:1
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lovesh
NN CONTROLLER FOR UPQC
- 2012-11-12 14:01:31下载
- 积分:1
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参数化FFT源代码,点数和位宽可变,内附testbench和说明文档
参数化FFT源代码,点数和位宽可变,内附testbench和说明文档-parameters of the source code FFT, counting and variable bit-enclosing testbench and documentation
- 2022-02-20 03:06:01下载
- 积分:1
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SHIFT_8REG是8位的一个具有移位功能的寄存器,每一次数据打入都会从这个寄存器的最低位打入,并相应进行向左移位。
ODD_110BREG是一个3位的备...
SHIFT_8REG是8位的一个具有移位功能的寄存器,每一次数据打入都会从这个寄存器的最低位打入,并相应进行向左移位。
ODD_110BREG是一个3位的备份寄存器,寄存器中存放的是奇数帧的同步头,也就是110。
EVEN_9BHREG是一个8位的备份寄存器,寄存器中存放的是偶数帧的同步头,也就是10011011。这两个寄存器的初始值在系统一开始就打入。
-SHIFT_8REG is eight with a displacement of the functional Register, Each will enter the data from the register into the lowest point, and the left shift accordingly. ODD_110BREG is a three backup Register, the Register is stored in the odd frame synchronization head, is 110. EVEN_9BHREG 8 is a backup Register, which register is kept even the first frame synchronization, is 10011011. This register the two initial value of the system into a start.
- 2022-05-15 03:11:22下载
- 积分:1
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SDRAM的vegilog代码,做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块...
SDRAM的vegilog代码,做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
- 2022-10-13 14:20:04下载
- 积分:1