一个基于C51指令系统的简易uCOS示范程序,有完整的代码分析

说明：  基于FPGA的VGA驱动代码VHDL 在显示屏显示一个汉字(FPGA-based VHDL code of the VGA driver that a character in the display)

基于ATEREAL EPM1270T144C5N CPLD 压力传感器数据采集原码 开发软件 Quartus II -ATEREAL EPM1270T144C5N CPLD-based pressure sensor data acquisition source Quartus II development software

手机号码归属地查询,代码详尽，简单易懂，欢迎使用！-hello!welcome to my code !thank you !

VGA字符显示VHDL程序 可以直接用于工程的设计与开发-VGA display characters can be directly used for VHDL design and development

About 1588 PTP protocol xillinx FPGA running code and Software application, and to introduce documents, want to help everyone

基于ＦＰＧＡ平台，实现了直接数字频率合成。-FPGA-based platform, to achieve a direct digital frequency synthesis.

说明：  matlab代码，利用Farrow结构设计分数延时滤波器，滤波器阶数和个数可分别进行设置，利用最大最小准则近似。(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)

2位并行加法器初学者必看初步了解FPGA-two count

SMII 到 MII 转换的VHDL代码-SMII to MII conversion of VHDL code

设计一个可编程间隔定时器，完成8253的功能，实现以下几点要求： 1、 含有3个独立的16位计数器，能够进行3个16位的独立计数。 2、 每一种计数器具有六种工作模式。 3、 能进行二进制/十进制减法计数。 4、 可作定时器或计数器。 -The design of a programmable interval timer, 8253 to complete the function, realize the following requirements: 1, contains three independent 16-bit counter, capable of three independent 16-bit count. 2, each with six counter mode. 3, can be binary/decimal subtraction count. 4, can be used for the timer or counter.