用VHDL语言在CPLD上实现串行通信

在FPGA中，采用verilog HDL语言实现图像处理算法sobel，仿真实验通过(In the FPGA using verilog HDL language image processing algorithms sobel, simulation experiment)

these are verilg prgms

基于FPGA的键盘程序代码，可用单片机控制-FPGA-based keyboard program code can be used SCM control

全加器的VHDL程序实现及仿真-full adder VHDL simulation program and

FPGA UART 发送端程序 verilog语言编写 9600波特率 实用(UART transmit side program verilog language 9600 baud)

说明：  iic总线挂接在amba的apb总线上，标准接口，verilog代码的实现(iic bus attached to the amba' s apb bus, standard interfaces, verilog code implementation)

VHDL implementation of RC6 encryption algorithm Test file represent applying all zero input and all zero key note that result is correct but bytes positions are swapped

说明：  电子工程师学习的最好的学习资料，能够了解电子设计必学软件资料。建议珍藏，电子设计初学者必备(Electronic engineers to learn the best learning materials, to understand the electronic design will learn software data. Recommended collection, electronic design for beginners)

the interface design of pcie based on FPGA

rs422标准通讯模块 异步收发 verilog语言编写(rs422 standard communication module asynchronous receiver verilog language)