VHDL 乘法器 源代码，很好的VHDL 入门学习例程序

说明：  这里是apb总线设计代码。这个源程序是基于verilog语言设计的(Here is the APB bus design code. This source program is designed based on Verilog language)

说明：  在quartus上运行16QAM仿真，实现在modelsim上的波形仿真(Running 16QAM simulation on quartus)

VHDL实现ALU的源代码，并且提供了一个详细的testbench！-ALU VHDL source code, and provide a detailed testbench!

液晶的控制，有VHDL语言实现-lcd control

基于FPGA的16QAM调制器设计与实现(Design and implementation of 16QAM modulator based on FPGA)

VHDL描述的时钟分频电路，用途广-VHDL description of the clock divider circuit, uses widely ...

This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.

关于XILINX FPGA 内部 中文培训教材-XILINX FPGA on internal training materials in Chinese

通过凌阳16位单片机实现复读机的应用的程序。(By Sunplus 16-bit MCU repeater application process.)

说明：  microsemi的Libero IDE 软件内部IP核详解(Microsemi's Libero IDE software internal IP kernel details)