现色彩空间转换R’G’B’ to Y’CbCr的VHDL源代码。

分别用分频比交错法及累加器分频法完成非整数分频器设计。-Points were staggered method and frequency than the frequency accumulator law to complete the design of non-integer divider.

verilog HDL经典的入门书籍，内容很详细，讲了许多实例，适合硬件描述语言初学者。(verilog HDL classic introductory book, the content is very detailed, spoke many instances, suitable hardware description language for beginners.)

常见的几种电机的特征与控制方法-Several common characteristics of the motor and control method

VHDL Programmes -2 for dumping on FPGA

Introduction to learn laboratry with altera quartus II 9.1

说明：  SDRAM的驱动程序，主要是对SDRAM各类状态进行驱动，有刷新模块、读、写模块等。(The driver of SDRAM mainly drives various states of SDRAM, including refresh module, read and write module.)

quartus license dede(quartus 11.0 license)

附件 介绍了如何 使用compxlib命令编译Xilinx的ModelSim仿真库，创建这个仿真库对ISE调用modelsim是必不可少的一步,该法完全自动化，免去繁杂的手动操作，是创建这个仿真库最简洁的方法之一-Annex compxlib introduce how to use Xilinx

数字信号源，输出不同频率，相位的正余弦信号，-Digital signal source, the output of different frequency, phase is the cosine signal,

Viterbi译码器的编解码器的设计 用Verilog实现-Viterbi decoder。Verilog