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forwarding
浙江大学体系结构实验课代码,5级流水线实现旁路和停顿(5-stage pipeline to achieve realization of the bypass pipeline bypass pause 5 pause)
- 2020-09-26 12:07:46下载
- 积分:1
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Single-CPU
说明: 简单的单周期CPU设计,实现的指令有:算术运算指令、逻辑运算指令、移位指令、比较指令、存储器读/写指令、分支指令、跳转指令、停机指令。(Simple single-cycle CPU design,The instructions implemented are as follows:Arithmetic operation instruction, logical operation instruction, shift instruction, comparison instruction, memory read/write instruction, branch instruction, jump instruction, stop instruction.)
- 2020-06-16 12:28:32下载
- 积分:1
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vhdl.9up
have a good documenty
- 2010-04-15 14:26:07下载
- 积分:1
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AHBtoAPB
说明: amba总线桥:ahb to asb!verilog hdl文档加代码,非常全,soc(amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc)
- 2021-01-05 03:48:55下载
- 积分:1
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四进制计数器模块,使用VHDL语言编写,在ISE8.1中经过测试的模型...
四进制计数器模块,使用VHDL语言编写,在ISE8.1中经过测试的模型-quaternary counter module, the use of VHDL language, in which ISE8.1 tested model
- 2022-02-06 20:22:16下载
- 积分:1
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RAM
这是个双端口双端口ram的定义,当然读者在此基础上还可以扩充(This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded)
- 2009-05-24 11:41:19下载
- 积分:1
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CCSDS预测编码
最新的CCSDS高光谱图像压缩算法标准的FPGA实现,用VHDL实现的。可参考。绝对物有所值,希望对你的设计有所帮助!
- 2022-04-18 02:18:29下载
- 积分:1
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等精度测试频率计,包括程序源代码以及相关注释
等精度测试频率计,包括程序源代码以及相关注释-Precision test frequency meter, etc., including source code and related comments ......
- 2022-04-08 21:00:44下载
- 积分:1
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HDMI
Verilog 写的HDMI接口源程序及说明文档(HDMI interface verilog code and specificaiton paper)
- 2010-09-27 11:18:01下载
- 积分:1
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can-lite-vhdl-master
CAN VHDL Code. Behavioral implementation of CAN bus interface.
- 2021-01-19 21:48:41下载
- 积分:1