DDs直接数字频率合成器的源代码，其中包括采用IP核和普通两种方式...

I2C配置tvp5150用VHDL写的 -I2C configuration tvp5150 written using VHDL

以太网协议 TCP/IP/DHCP协议verilog实现(Ethernet IP/TCP/DHCP verilog source code)

DSP 程序的测试 很有用的 仪器上面用的-DSP testing procedures very useful in the above apparatus

使用Matlab Gui实现的数字信号处理常用算法，包括卷积，FFT，FIRIIR数字滤波器设计，最佳滤波器，自适应滤波，卡尔曼滤波等

本书共由三篇组成。其中第一篇由第1~3章组成，介绍PCI总线的基础知识。第二篇 由第4~13章组成，介绍PCIExpress总线的相关概念。第二篇的内容以第一篇为基础。(This book comprises a total of three components. The first chapter from the first 1-3 chapters, introduces the basics of the PCI bus. Second by the first 4 to 13 chapters, introduces concepts related PCIExpress bus. The contents of the first to second basis.)

source vhdl code of D flipflop logic

四位动态刷新数码管显示，ＶＥＲＩＬＯＧ代码，含详细的中文注释．-Four dynamic refresh digital tube display, VERILOG code, with detailed notes in Chinese.

FIR滤波器的VHDL源代码及测试文件，已通过编译仿真，绝对正确。(FIR filter VHDL source code and test files, has passed the compiled simulation, absolutely correct.)

a manual for design implementation of fpga and ASIC using verilog

VHDL描述的简易图像缩小模块，将PAL制720×576的图片缩小为512×410，采用最近临域法，13.5MHz时钟下可实时处理PAL视频。-VHDL description of a simple image to narrow the module, will be PAL system of 720 × 576 image reduced to 512 × 410, using the recent Pro-domain method, 13.5MHz clock can handle PAL video in real time.