xilinx CTC IPcore(encoder 和 decoder）的标准测试，未经信道加噪

ODBC编程实例，使用ODBC对基于开关量数据采集卡的通信接口设计与实现。(ODBC programming examples, using ODBC for data acquisition card based digital communications interface design and implementation.)

Brazo robotico proyecto para laboratorio

Great guide for writing VHDL

对PCM编码的多路复用与解复用程序，VerilogHDL源程序-Of PCM-encoded multiplexing and demultiplexing process, VerilogHDL source

四分频的程序，输出clkout0就是二分频，clkout1是四分频-Quarter-frequency process, the output clkout0 is two-way, clkout1-fourth the frequency

基于FPGA的快速傅里叶变换。使用ISE软件以及MATLAB验证。(FFT based on FPGA)

说明：  there's a clock divider for DE2 altra board clock (50MHz)

说明：  这是一款由晶振产生的脉冲控制的数字钟，可以从00:00:00到23:59:59之间进行计时。(this is a clolk controlled by continuious pulse.it can timing from 00:00:00 to 23:59:59.)

坦克游戏用VHDL语言编写。Altera的随身携带套件DE1。PS2键盘接口和VGA

用VHDL语言仿真交通灯 用VHDL语言仿真交通灯-Simulation using VHDL language VHDL language with traffic lights traffic lights Simulation