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New-Folder
to learn bout development of vhdl code
- 2014-03-15 16:21:38下载
- 积分:1
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6级流水,verilog实现浮点数的加法,其中浮点数格式符合IEEE754标准...
6级流水,verilog实现浮点数的加法,其中浮点数格式符合IEEE754标准-6 water, verilog realize the floating point adder, in which floating-point format in line with the IEEE754 standard
- 2023-09-01 12:35:04下载
- 积分:1
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xiawenyu-verilog-
数字系统设计的入门书,教你如何学会用verilog语言实现各种数字逻辑功能,例程经典易懂(xiawenyu verilog)
- 2012-02-18 11:40:39下载
- 积分:1
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8255参考设计VHDL源代码
8255参考设计VHDL源代码-The sound code of 8255 reference design based on VHDL
- 2022-05-31 03:46:31下载
- 积分:1
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VC707_MIG_DDR3
说明: VC707_MIG_DDR3.sim文件夹中是仿真的文件:testbench和DDR3模型参数
VC707_MIG_DDR3.srcs文件夹中是源文件,包含DDR3的控制、收发模块、顶层文件(VC707_ MIG_ In ddr3.sim folder are simulation files: testbench and DDR3 model parameters
VC707_ MIG_ Ddr3.srcs folder is the source file, including DDR3 control, transceiver module, top-level file)
- 2020-10-16 19:20:53下载
- 积分:1
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adda
基于FPGA 黑金ALINX 515的 ADDA采样模块源码(需调试)(ADDA Sampling Module Source Code Based on FPGA Heijin ALINX 515)
- 2020-06-20 13:00:01下载
- 积分:1
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本文描述了fpga中的亚稳态时如何产生的,以及如何计算亚稳态的平均无故障时间。对了解亚稳态有帮助。...
本文描述了fpga中的亚稳态时如何产生的,以及如何计算亚稳态的平均无故障时间。对了解亚稳态有帮助。-This paper describes the sub-fpga how the steady state, as well as how to calculate the metastable MTBF. The understanding of metastable helpful.
- 2022-06-01 03:41:23下载
- 积分:1
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doorlock
基于FPGA设计的电子密码锁是一个小型的数字系统,与普通机械锁相比,具有许多独特的优点:保密性好,防盗性强,可以不用钥匙,记住密码即可开锁等。(FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages:good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks.)
- 2013-12-25 21:24:41下载
- 积分:1
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色彩空间转换硬件实现,用于图像处理,编码,解码部分
色彩空间转换硬件实现,用于图像处理,编码,解码部分-Color space conversion hardware for image processing, encoding, decoding part of the
- 2022-09-14 12:00:03下载
- 积分:1
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5
fpga paper function fff(fpga paper function)
- 2010-03-11 23:15:24下载
- 积分:1