四位抢答器

sdi音频嵌入及解嵌代码,代码使用Verilog HDL语言(SDI audio embedding and decoding code, the code using Verilog HDL language)

v6 1x 3.125G rapidio协议工程代码(xilinx v6 rapidio data transmission protocol Practical project application engineering code)

spansion file system包括FTL功能, 支持NAND, NOR, SPI flash.(spansion file system including FTL module, support NAND, NOR, SPI flash.)

实现DE2_115开发板上配套的500万像素cmos摄像头捕捉到的画面显示在VGA上(DE2_115 development board supporting 5,000,000 pixels cmos camera to capture the screen display in VGA)

VHDL常用源程序，希望以EDA技术学习者有用！-VHDL source code commonly used, I hope to EDA technology learners useful!

Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in single core.

SPI串行总线接口的Verilog实现，详细讲解实现过程。-SPI serial bus interface Verilog realization elaborate on the realization of the process.

在MAXPLUSII下实现BOOTH算法，可以进行任意位K×K的乘法-BOOTH algorthim implemented in the MAXPLUSII environment, which can carry out arbitrary bits multiplication.

gps C/A码生成 生成gps32颗卫星伪码，方便，经过测试(gps C/A code generation to generate pseudo-code satellites gps32, convenient and tested)

能够完美产生数字地面电视（DTMB）的信源的程序。帧头模式为模式一。信道可选择，信号加入频偏，延时，后经滤波器后输出。(Able to produce perfect digital terrestrial television (DTMB) of the source program. Mode is the mode a header. Channels to choose from, the signal adding offset, delay, after the filter output.)