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Y312448.zip
基于VHDL的SDH专用芯片的TOP-DOWN设计,
内有全套源码以及图片,内容详尽,绝对真实可靠!(VHDL based on the SDH ASIC Design TOP-DOWN, which has a full set of source code, as well as pictures, and detailed, reliable and absolutely true!)
- 2008-05-12 19:21:03下载
- 积分:1
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Lcd
说明: VHDL资料 很不错的!!!!!!!!!!!(VHDL )
- 2009-08-14 22:47:46下载
- 积分:1
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8bit-cpu
VHDL由简单存储器,计数器等搭建最终实现8位的cpu设计(VHDL realization 8 of cpu design)
- 2015-10-16 14:26:34下载
- 积分:1
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zidongmen1
说明: 控制步进电机转动,正反转,旋转角度完美掌握。很好用,亲测(Control stepping motor rotation, positive and negative rotation, perfect control of rotation angle. Very easy to use, personal test)
- 2018-12-25 16:41:07下载
- 积分:1
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jtag
verilog语言编写的jtag(边界扫描模块),初学的时候可以看看(verilog language jtag (boundary scan module), a novice when you can look)
- 2021-04-27 14:38:44下载
- 积分:1
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Nexys-4-DDR-XADC
Nexys-4-DDR-XADC 开发板demo(Nexys-4-DDR-XADC e.v. Board demo)
- 2018-12-07 15:33:22下载
- 积分:1
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SPI serial bus interface Verilog realization elaborate on the realization of the...
SPI串行总线接口的Verilog实现,详细讲解实现过程。-SPI serial bus interface Verilog realization elaborate on the realization of the process.
- 2022-11-13 03:50:04下载
- 积分:1
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High-speed-digital-correlator
16位高速数字相关器的VERIOLOG程序,已经编译通过了,可以使用(16-bit high-speed digital correlator VERIOLOG program has been compiled by, you can use)
- 2020-10-09 11:37:34下载
- 积分:1
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ad9288
使用FPGA控制AD9288,方便移植,可以拿来直接使用,适合新手学习(Use FPGA control AD9288, easy migration, can be used to directly use for novices to learn)
- 2021-04-21 08:58:49下载
- 积分:1
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tb_time_offfset
说明: offset_cancellation code for matlab to hdl
- 2020-06-17 12:20:02下载
- 积分:1