-
fifo
FPGA的fifo与dsp的emif接口测试程序(EMIF interface test program for FIFO and DSP of FPGA)
- 2020-12-03 16:59:25下载
- 积分:1
-
FPGA设计的I2C总线控制器的MASTER端的程序
FPGA设计的I2C总线控制器的MASTER端的程序-FPGA Design of I2C Bus Controller MASTER-side procedures
- 2022-03-14 08:16:35下载
- 积分:1
-
navigation
Ship navigation project
- 2014-12-04 18:58:16下载
- 积分:1
-
SONY公司出品的黑白CCD(44万像素)ICX229的驱动信号产生程序
SONY公司出品的黑白CCD(44万像素)ICX229的驱动信号产生程序-SONY company produced black-and-white CCD (44 megapixels) ICX229 the drive signal generation process
- 2022-04-17 08:51:11下载
- 积分:1
-
de2 vga controller board can also be used for other development
de2 vga控制器,也可用于其他板子开发-de2 vga controller board can also be used for other development
- 2022-05-17 01:30:37下载
- 积分:1
-
CPLD总线Verilog HDL代码,PLD
CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.-CPLD bus Verilog HDL code, the PLD-10 Quartus4 platform to run through.
- 2022-01-26 04:10:04下载
- 积分:1
-
ahb_sramc_svtb
ahb总线Verilog代码及sv仿真文件(ahb bus Verilog code and sv simulation code)
- 2021-05-14 14:30:02下载
- 积分:1
-
VGA采用Spartan 3E板系统的VHDL
Vga in vhdl using spartan 3e board basys
- 2023-04-03 19:05:04下载
- 积分:1
-
信号的提取
说明: 1、SignalTap II Logic Analyzer使用方法;
2、掌握捕获条件的设置
3、学会硬件信号分析,了解硬件信号监视和软件调试的差异(1. How to use signaltap II logic analyzer;
2. Master the setting of capture conditions
3. Learn hardware signal analysis, understand the difference between hardware signal monitoring and software debugging)
- 2021-01-11 14:31:37下载
- 积分:1
-
multiply_8_VHDL
由8 位加法器构成的以时序方式设计的8 位乘法器,采用逐项移位相加的方
法来实现相乘的VHDL程序代码。包含几个小模块和一个顶层设计文件,运行可用。(an 8 bit multiplier combined with 8 bit adder using a design by way of timing,and it use a way of Itemized shift to implement the multiply.It include some little module and a top level design document.)
- 2014-04-11 16:58:04下载
- 积分:1