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Vending machine design, source code, in the hope that useful
自动售卖机的设计,有源代码,希望对大家有用-Vending machine design, source code, in the hope that useful
- 2022-01-22 14:24:49下载
- 积分:1
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code
adder 18b trong chuong trinh verilog
- 2017-11-26 14:34:56下载
- 积分:1
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lvds_ctr_top
说明: 用verilog编写的LVDS接口驱动程序,采用IOSERDES技术实现,经过Spartan6 FPGA调试验证,有完整的工程。(The LVDS interface driver written in verilog is implemented using IOSERDES technology. After Spartan6 FPGA debugging and verification, there is a complete project.)
- 2020-03-16 10:29:10下载
- 积分:1
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cmsdk_apb_timer
说明: 关于计时器 verilog语言,采用arm架构的m3,可以直接应用于soc(About timer verilog language, USES the arm architecture of m3, can be directly applied to soc)
- 2021-04-26 12:38:45下载
- 积分:1
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用FPGA verilog hdl实现千兆以太网MAC。
用FPGA verilog hdl实现千兆以太网MAC。-Using FPGA verilog hdl realize Gigabit Ethernet MAC.
- 2022-05-10 18:11:05下载
- 积分:1
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state-machine
一个简单的用verilog实现的售货机状态机设计,内有word介绍设计的原理(A simple realization of a vending machine with verilog state machine design, there are design principles introduced word)
- 2021-01-20 23:48:42下载
- 积分:1
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core_arm.tar
ARM7系统IP核的VHDL语言源代码,需要的开发环境是QUARTUS II 6.0。(ARM7 System IP Core VHDL language source code, the need for the development environment is QUARTUS II 6.0.)
- 2021-04-20 00:18:51下载
- 积分:1
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"digital circuit EDA portal
《数字电路EDA入门-VHDL程序实例》---交通灯程序例子-"digital circuit EDA portal-VHDL program examples"-- traffic lights procedures example
- 2022-02-19 21:55:09下载
- 积分:1
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progconterful
four bit counter verlog source code for veriwell including test bench
- 2010-03-29 18:54:45下载
- 积分:1
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7-5
基于FPGA的ip核FIR低通滤波器,实现滤波功能,简单好用(FPGA-based ip core FIR filter for filtering function, easy to use)
- 2020-10-05 11:47:38下载
- 积分:1