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发送卡
led 发送卡代码(led send card verilog)
- 2021-04-06 11:19:02下载
- 积分:1
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dp_xiliux the CPLD Verilog design experiments, clock demo. code test.
dp_xiliux 的 CPLD Verilog设计实验,时钟演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, clock demo. code test.
- 2022-12-25 17:55:03下载
- 积分:1
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Regs
一个小寄存器堆,使用参数化编程,附有仿真代码,可直接在vivado(2018.2版本及以后)上运行(A small register heap, using parametric programming)
- 2019-04-03 14:19:55下载
- 积分:1
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verilog-ethernet
说明: Collection of Ethernet-related components for gigabit, 10G, and 25G packet processing (8 bit and 64 bit datapaths). Includes modules for handling Ethernet frames as well as IP, UDP, and ARP and the components for constructing a complete UDP/IP stack. Includes MAC modules for gigabit and 10G/25G, a 10G/25G PCS/PMA PHY module, and a 10G/25G combination MAC/PCS/PMA module. Includes various PTP related components for implementing systems that require precise time synchronization. Also includes full MyHDL testbench with intelligent bus cosimulation endpoints.
- 2021-04-17 23:38:52下载
- 积分:1
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and VHDL source code
VHDL与源代码包-and VHDL source code
- 2022-07-21 05:42:10下载
- 积分:1
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PCI IP核vhdl源码,Xilinx原版
PCI IP 核 Xilinx原版,很好用,国际知名公司Xilinx原版,值得信赖
- 2023-05-01 04:45:04下载
- 积分:1
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generateCAcode
gps C/A码生成
生成gps32颗卫星伪码,方便,经过测试(gps C/A code generation to generate pseudo-code satellites gps32, convenient and tested)
- 2021-05-13 04:30:02下载
- 积分:1
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LDPC
LDPC Encoding Ebook Tetourial code
- 2021-03-23 08:49:15下载
- 积分:1
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用状态机对A/D转换器0809的采样控制电路的实现。工具:Quartus ii 6.0 语言:VHDL...
用状态机对A/D转换器0809的采样控制电路的实现。工具:Quartus ii 6.0 语言:VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL
- 2022-05-14 13:34:13下载
- 积分:1
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biaojue4
此代码实现4人表决功能,4人中有三人同意即为通过。(Four voting)
- 2013-10-29 21:46:07下载
- 积分:1