出租车的计费系统，通过这个文件可以清楚地了解出租车的计费原理。...

SHIFT_8REG是8位的一个具有移位功能的寄存器，每一次数据打入都会从这个寄存器的最低位打入，并相应进行向左移位。 ODD_110BREG是一个3位的备份寄存器，寄存器中存放的是奇数帧的同步头，也就是110。 EVEN_9BHREG是一个8位的备份寄存器，寄存器中存放的是偶数帧的同步头，也就是10011011。这两个寄存器的初始值在系统一开始就打入。 -SHIFT_8REG is eight with a displacement of the functional Register, Each will enter the data from the register into the lowest point, and the left shift accordingly. ODD_110BREG is a three backup Register, the Register is stored in the odd frame synchronization head, is 110. EVEN_9BHREG 8 is a backup Register, which register is kept even the first frame synchronization, is 10011011. This register the two initial value of the system into a start.

出租车模块设计加nios2设计cup程序代码 出租车模块设计加nios2设计cup程序代码-Taxi modular design design cup plus nios2 code taxi modular design design cup plus nios2 code

说明：  BT656 时序, 逐行, 分辨率1280*960@25Hz(BT656 time series, row by row, resolution 1280*960@25Hz)

用verilog 语言编译16QAM调制(a great complied code of 16QAM modulation for OFDM)

SPI接口的实现以及对外设的读写操作，其中包扩了几种工作方式，同时可以读取外设的版本号，传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps

verilog基础练习，介绍怎样编写测试文件和仿真-Verilog based on exercises, how to introduce the preparation of test documentation and simulation

这是本人设计的一个关于VME总线接口的FGPA程序，FPGA一边连接ARM LPC2294，一边连接VME总线，FPGA采用的XILINX公司的SPARTANII系列，程序包包含完整的工程文件-This is my design of a VME bus interface on the FGPA procedures, FPGA side of the connection ARM LPC2294, while connecting VME bus, FPGA using the XILINX Inc. SPARTANII series, the package contains a complete project file

RS编码器在fpga上的实现，用的modelsim开发环境(RS encoder in the realization of the fpga, development environment used in modelsim)

VHDL USB2.0接口源码,内有说明,详细.-VHDL USB2.0 interface source code, which is described in detail.

说明：  编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现，包含整个QuartusＩＩ的工程文件，解码方式为寄存器交换法(Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange)