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code
modelsim下的60进制计数器源码和测试激励文件(modelsim M counter 60 under the source file and test incentives)
- 2009-07-17 10:26:46下载
- 积分：1
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verilog编写的全功能串口
verilog编写的全功能串口-verilog programme of serial port
- 2022-05-19 04:03:59下载
- 积分：1
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代码基于VHDL语言的个文化代码有用的但是可能有错误下在是倾销心...
代码基于VHDL语言的个文化代码有用的但是可能有错误下在是倾销心-VHDL code based on the cultural code useful but may be under the wrong heart is dumping
- 2022-04-13 03:11:13下载
- 积分：1
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NN-using-FPGA
thesis about design and implementation neural network using FPGA
- 2013-12-29 16:23:52下载
- 积分：1
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A4_Uart_Top
说明： 串口！ 这是一个使用的通信程序 ， 非常好用。(serial port Serial port! This is a communication program used, very useful.)
- 2020-06-17 14:00:01下载
- 积分：1
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XilinxFpgaDesignAndTest
Xilinx fpga 设计培训中文教程,比较好的学习FPGA入门的教程(Xilinx fpga design training for Chinese curricula, better start learning FPGA Tutorial)
- 2020-08-13 15:58:30下载
- 积分：1
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verilog 入门概述 新手学习资料
verilog 入门概述 新手学习资料-Getting Started with an overview of novice learning materials verilog
- 2022-03-09 23:40:45下载
- 积分：1
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Moltiplicatore-FP
moltiplicatore floating point
- 2009-05-12 20:26:28下载
- 积分：1
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RISC
说明： RISC全部源码，包含仿真文件，使用makefile脚本编写，能通过vcs编译(RISC all source code, including simulation files, using makefile script, can be compiled through VCS)
- 2020-04-14 22:10:52下载
- 积分：1
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A complete viterbi coding procedures, the use of VHDL language, as well as test...
一个完整的viterbi编码程序，使用vhdl语言编写，还有测试程序-A complete viterbi coding procedures, the use of VHDL language, as well as test procedures
- 2022-04-12 08:34:41下载
- 积分：1
