计算机体系结构手册上的Verilog HDL

K9HCG08U1D K9PDG08U5D K9LBG08U0D K9MDG08U5D 三星 4G 8G 16G nand资料-K9HCG08U1D K9PDG08U5D K9LBG08U0D K9MDG08U5D Samsung 4G 8G 16G nand datasheet

自己写的布斯4算法的华莱士树无符号数乘法器，3-2压缩，亲测可用(Wallace wrote the number 4 Booth algorithm unsigned multiplier, 3-2 compression, pro-test available)

针对Altera的DE2/ DE1交互板的音频核心的音频编解码器（编码器/解码器），并提供了音频输入和输出的接口。(The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and output.)

四分频的程序，输出clkout0就是二分频，clkout1是四分频-Quarter-frequency process, the output clkout0 is two-way, clkout1-fourth the frequency

说明：  对MAX5250芯片进行控制，实现DA转换输出。(Controlling MAX5250 Chip)

串口收发，实现可调波特率的串口通信，verilog源码(Serial port and transceiver)

这是一个很好的基于verilog的串口通信422模块，已经经过多次验证，绝对可靠，可直接使用，本人已在工程中多次使用，无误差(This is a good serial communication based on Verilog 422 module, has been repeatedly verified, absolutely reliable, can be used directly, I have repeatedly used in the project, no error)

数字电路课程设计，用VHDL实现交通灯的控制(Digital circuit design using VHDL control of traffic lights)

红外接收处理，根据外部波形记录波形的高低电平时间，从而得到波形数据。(Infrared receiver processing, according to the external waveform waveform record high and low times, resulting waveform data.)

扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现-Frequency-hopping communication QUARTUS7.0 expanded development environment in the VHDL source code and the achievement of the overall block diagram