Priority encoder in VHDL.

verilog HDL verilog HDL verilog HDL -verilog HDL

说明：  rgmii代码编写，实现rgmii接口功能，可进行参考设计(The rgmii code is written to realize the function of rgmii interface, which can be used for reference design)

XAPP224 VHDL Data Recovery design file

采用Verilog HDL语言编写的直流电动机控制系统，主要完成直流电动机的速度控制，典型的三闭环(位置、转速和电流反馈)直流电机控制系统，对控制类相关的学习者价值很高(Using Verilog HDL language of the DC motor control system, mainly the completion of DC motor speed control, a typical three-loop (position, speed and current feedback) DC motor control system for control-type high-value related to the learner)

xc2s100E FPGA的原理图 给想涉足FPGA的新人参考-xc2s100E FPGA schematic diagram of the FPGA would like to set foot in the new reference

8通道同步AD芯片7608的FPGA控制程序(FPGA control program of ad7608(8 channel synchronous AD chip))

说明：  使用Verilog编写的24位定时器，具有apb 总线接口，可以设置工作方式和计数初值。(The 24-bit timer written by Verilog has APB bus interface, which can set working mode and count initial value.)

介绍了如何用vhdl语言实现处理器的spi接口-Describes how to use VHDL language processor spi interface

802.1as gptp标准包解析verilog模块。用于实现EAVB协议的重要部分。(802.1as gptp verilog module, part of EAVB procotol)

学习ALU的设计方法。 2、用HDL语言采用行为描述的方法完成74181的逻辑设计 。(Learn the design method of ALU. 2, use HDL language to use behavioral description method to complete 74181 logical design.)