Xilinx FPGA using leftover multipliers and block RAM

说明：  ds18b20的Verilog程序，经测试验证可以使用。注意此版本为DALLS DS18B20而不是DS1820,注意加5K上拉电阻。(ds18b20 the Verilog process can be used to verify by testing. Note that this version rather than DALLS DS18B20 for DS1820, the attention of Canadian 5K pull-up resistor.)

VGA interface using Spartan3E board from DIGILENT.Labview .vi

SPI接口协议，将spi总线转换成为LOCALBUS总线(SPI interface protocol, the spi bus converted into LOCAL BUS bus)

一个数字电路设计：六层电梯自动运行的VHDL程序(a digital circuit:sixlift design)

用VHDL实现视频控制程序,实现对图像的采集和压缩,-Using VHDL realize video control procedures, to achieve image acquisition and compression,

说明：  VHDL资料 很不错的！！！！！！！！！！！(VHDL )

介绍了硬件语言的仿真软件modelsimse的操作是使用方法，可以为入门的参考资料-Introduction of the hardware language modelsimse operation simulation software is to use the method of reference for the entry

Complete Successive approximation Analog to digital converter along with the source code

AES算法在FPGA上的实现，对AES算法所用的器件资源进行了总结(AES on FPGA the Fastest to the Smallest)

Ovo sto saljem je tutorijal 7 sa vhdlom