数字时中（VHDL）

说明：  CPU设计，包含基本的指令集，能执行简单的程序。考虑了CPU，寄存器，存储器和指令集之间的关系。即读写寄存器，读写存储器和执行指令。(CPU design, including basic instruction set, to execute a simple program. Consider the CPU, registers, memory, and the relationship between instruction sets. That read and write registers, read and write memory and execution.)

基于verilog语言的数据选择器，包括数据选择器的测试模块 (verilog language based on the data selector, including data selection for the test module)

键盘输入串口输出显示字符,通过串口显示键盘输入的字符-Keyboard input serial output display characters, the keyboard input through serial display characters

这是使用VHDL语言编写的密码锁程序,供大家参考-This is the use of the VHDL code lock preparation procedures for reference

随机数发生器

Vhdl code for aarithmetic logic unit

very good code for edge detection based on vhdl programming.

加法计数器的VHDL工程，程序，仿真图形-adder jishuqi de VHDL FANGZHEN ,CHENGXU

基于VHDL+FPGA的神经网络设计，实现简单的字符识别(Design of Neural Network Based on VHDL+FPGA to Realize Simple Character Recognition)

完整的GMSK调制及维特比译码，程序中包括了高斯滤波器的设计，调制相位的计算，并采用了维特比译码算法解调出原始码元，最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)