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verilog-som
拿verilog编写的som(自适应神经网络算法),用于障碍物检测,基于FPGA可综合实验,已经在altera的cylcone上实现(Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone)
- 2020-07-09 20:38:55下载
- 积分:1
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RAYLEIGH
matlab 编的瑞利信道仿真源码,对研究信道很有用(hgajdjkjhakhdkhakjlkjlka)
- 2010-01-17 20:47:43下载
- 积分:1
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Collected their own routines VHDL code, suitable for beginners to learn, I hope...
自己收集的VHDL例程代码,适合初学者学习用,希望能给大家带来帮助。-Collected their own routines VHDL code, suitable for beginners to learn, I hope we can help.
- 2022-07-02 04:49:52下载
- 积分:1
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Interleaver
基于FPGA实现交织 在通信中交织的算法 已在板上通过测试(based on FPGA to Interleaver)
- 2018-02-01 20:54:13下载
- 积分:1
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实现在屏幕上显示绿色和红色相间的水平条纹
实现在屏幕上显示绿色和红色相间的水平条纹。其中,vga_640x480模块将产生行同步信号hsyn和场同步信号 vsync; vga_stripes模块将产生red、green和blue三个输出。(The horizontal stripes of green and red are displayed on the screen. Among them, vga_640x480 module will produce line synchronization signal Hsyn and field synchronization signal vsync; vga_stripes module will produce red, green and blue three outputs.)
- 2020-06-24 02:00:02下载
- 积分:1
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fpga DDS ROM数据正弦波形正半周采样程序
fpga DDS ROM数据正弦波形正半周采样程序-fpga DDS ROM sinusoidal waveform is a half weeks of data sampling procedures
- 2022-03-09 21:09:04下载
- 积分:1
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SystemC-UART
基于SystemC的Uart模型-----文档(SystemC the Uart model of----- document)
- 2013-01-24 16:41:35下载
- 积分:1
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九层单个电梯的控制系统设计和测试代码rar
说明: 这是一个单个的九层的电梯控制系统的VHDL代码,具有外部上下楼控制按钮和内部上下楼控制按钮。另外还有测试代码。(This is a design of nine floor lift control system with VHDL code and testbench.)
- 2020-06-19 22:03:11下载
- 积分:1
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任意基数分频VERILOG代码,经过了编译,可以修改数字改变分频。...
任意基数分频VERILOG代码,经过了编译,可以修改数字改变分频。-Arbitrary base frequency Verilog code, after compilation, the figures can be amended to change the frequency.
- 2022-08-10 12:37:41下载
- 积分:1
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用fpga驱动lcd的原代码,是用vhdl语言实现的
用fpga驱动lcd的原代码,是用vhdl语言实现的-drive lcd by fpga,the source program is written by vhdl
- 2023-05-04 23:15:03下载
- 积分:1