des加密算法的verilog语言的实现

Oregano Systems 8051 ip核-Oregano Systems 8051 ip core

用VHDL编写的串口通讯程序，包括几个不同的程序例子，也可以用verilog进行改写。()

四选一编程语言，可以自动生成四选一器件。-First elected four programming languages, you can automatically generate a four selected devices.

ISA总线资料《ISA System Architecture》(ISA System Architecture)

ALTERA on chip fifo. this document is from altera. good resouce

基于VHDL的TPC译码器的设计，简述了tpc译码的算法步骤，tpc硬件实现的模块和部分vhdl程序(TPC decoder VHDL-based design, outlines the decoding algorithm steps tpc, tpc hardware modules and some vhdl program)

fpga verilog实现 S29GL256S 系列 并行 nor flash 的读写擦除操作功能。 verilog源代码。(Verilog S29GL256S to achieve FPGA series parallel flash nor read and write erase operation function. Verilog source code)

通过用vivado完成一个流水灯项目手把手教你如何使用vivado，内容十分详细。(Using vivado to complete a running light project, you can learn how to use vivado by hand. The content is very detailed.)

Synopsys 8051 IP core documentation.

从入门到精通，从简单到难，带你轻轻松松玩转FPGA(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)