Fun little FPGA that plays a portion of Habanera

FIR滤波器的VHDL语言实现(The implement of FIR Filter based on VHDL)

基于vhdl语言的15位gold序列的设计的开端一部分程序(Vhdl language based on sequences of the 15 gold as part of the beginning of the design process)

ISA总线资料《ISA System Architecture》(ISA System Architecture)

简单介绍了直接数字频率合成技术(DD S)，利用DDS设计任意 波形发生器，其能够产生矩形波、正弦波、三角波、锯齿波等多种波形 -A brief introduction of direct digital frequency synthesis (DD S), the use of DDS design of arbitrary waveform generator, which can produce rectangular wave, sine wave, triangle wave, sawtooth waveform etc.

FPGA verilog 实现任意位宽的移位相乘法，有符号小数或者有符号整数相乘。函数调用方式(FPGA verilog achieve any bit-wide shift multiplication , signed or signed decimal integer multiplication . Function call )

VHDL开发环境，四人抢答器，实现了四个人能同时抢答的功能。-VHDL development environment Answer four, and the realization of the four functions at the same time Answer.

说明：  该代码，只用了硬件描述语言Verilog在完成对SD卡控制器的编写，经济实用(The code, only the hardware description language Verilog in the completion of the SD card controller to prepare, economical and practical)

机器人控制,用matlab robotics toolbox 仿真设计(robotics controll using matlab robotics toolbo simulation)

8倍抽取的DDC模块。verilog写的，调试通过(failed to translate)

说明：  利用fpga实现gmsk的调制并仿真，全部代码(Fpga implements gmsk)