Xilinx公司Accel DSP项目

说明：  verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近(verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to)

mux one hwich is teh best knwo progerma i n the workdl and ist is the

USB设备接口的驱动程序，采用verilogHDL语言编写，并包含相关说明资料(USB device driver interface, using verilogHDL language, and contains descriptive information)

Xilinx FPGA make 50 smaller-Xilinx FPGA make 50 smaller

1024点fft verilog hdl-1024-point fft verilog hdl

SED1330/1335/1336/E1330液晶显示控制器及51汇编源程序.液晶显示程序,显示图形及汉字.-SED1330/1335/1336/E1330 LCD controller and the source of 51 Series procedures. LCD procedures, and show pictures of Chinese characters.

经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)

Interfacing RTC with spartan 3

基于DDS的信号发生器设计。DDS,FPGA,Verilog。(Design of signal generator based on DDS.DDS,FPGA,Verilog.)

使用FPGA实现UART收发。支持多种波特率。(Using FPGA to achieve UART transceiver.)