I2C控制器源代码，Verilog HDL语言，可以直接调用

Simple SPI interface realization on Verilog HDL with parameterized FIFO and APB interface

利用FPGA内核产生SPWM波，并且频率可调(The FPGA kernel is used to generate SPWM waves, and the frequency is adjustable)

APB 总线。可以实现单个数据在总机与从机之间的读写功能(This can achieve the read and write functions of a single data between the master and the slave .)

vhdl random numbergenerater

说明：  汉明编码和解码的硬件描述语言（verilog），其被编解码的数据为M序列。 建议运行软件为Quartus.(failed to translate)

camping checklist for outback campers. A must for deep forest hikers.

Synchronous DRAM (SDRAM) has become a mainstream memory of choice in embedded system memory design due to its speed, burst access and pipeline features. For high-end applications using processors such as Motorola MPC 8260 or Intel StrongArm, the interface to the SDRAM is supported by the processor’s built-in peripheral module.

基于DE2开发板，视频图像显示设计源代码，代码调试成功-based DE2 development board ,it is vhdl resourse code

fpga平台实现srio通信，以及srio端口寄存器设计。(FPGA platform to achieve sRIO communication, as well as sRIO port register design.)

用汇编语言设计的频率计，注释较详细，适于初学者学习使用(Assembly language design frequency meter, the comment in more detail, suitable for beginners to learn to use)