I2C控制器源代码，Verilog HDL语言，可以直接调用

This file contains async fifo design

说明：  verilog 编写的ldpc编码，含有两个文件(LDPC written by Verilog)

DAC0832 VHDL源程序 一个适合初学都的程序 (DAC0832 VHDL source code of a program suitable for both beginners)

说明：  DOCUMENT ON DISTRIBUTED ARITHMATIC

this come from alter ,you can look and find it on line.

Use verilog language design DIGITAL-PID source

此程序基于ADC0809,它是CMOS的8位A/D转换器，片内有8路模拟开关，可控制8个模拟量中的一个进入转换器中。-Connection between ADC 0809, it was the eight CMOS A/D converters. Tablets containing eight analog switches, control eight of analog converters enter a Chinese.

文章论述如何将向modelsim中添加仿真库，包括添加xilinx,altera,actel公司的仿真库的方法-Article on how to add ModelSim simulation library, including the add xilinx, altera, actel the company

代码文件夹： ARVI_FSM.v为顶层文件，用于模拟时用。 dataHex.dat 为模拟输入文件（只有10行，象征的意思。实际我们模拟时，dataHex.dat文件足有1个多GB） dataFormat.dat为输入文件对应的带格式的文件 使用modelsim模拟时，将dataHex.dat名字改为CPUContext.txt 结果: result.txt (Code folder: ARVI_FSM.v for top-level documents used for the simulation. dataHex.dat for analog input files (only 10 line, the meaning of the symbol. actual simulation we, dataHex.dat documents have more than one full GB) dataFormat.dat for the input file the corresponding file with modelsim simulation used to dataHex.dat name to CPUContext.txt results: result.txt)

FIR filter up to 128x