using VHDL keyboard scanning procedure can be slightly modified to use

由VHDL 语言实现的数控分频 利用的是QUARTUES环境已经得到验证-By the NC VHDL language is the use of sub-frequency QUARTUES environment has been tested

基于alteraCPLD芯片的VHDL点阵滚动显示源代码-VHDL-based alteraCPLD chip dot matrix rolling display the source code

16位的移位寄存器，加上testbench,可以在modelsim里面运行~-16 of the shift register and testbench, modelsim the inside running ~

This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.

说明：  HDB3编码通过verilog实现，通过modelsim仿真(HDB3 coding is implemented by Verilog and simulated by Modelsim)

用max+plusII编写的vhdl程序 乒乓球游戏机-with max plusII vhdl procedures for the preparation of the table tennis game

this is a verilog code for root raised cosine filter

xlinx官方的iic和spi接口的描述-IIC and xlinx official description of spi interface

VHDL代码完成行列交织与解交织的功能实现(the realization of interleaver on VHDL language)

SRAM读写测试，每秒进行一次单字节SRAM读写，使用chipscope观察时序波形(SRAM read and write test, a single byte SRAM read and write every second, using chipscope to observe the timing waveform)