build a tv box on fpga cyclone 2

这是一个verilog代码实现的常用乘法器。设计的是通用N比特乘M比特的二进制乘法器(This is a common multiplier verilog code. Design of a generic N bits by M bits of the binary multiplier)

中央空调的控制，3级控制系统，这个是中间控制的vhdl源代码-Central air-conditioning control, 3 control system, this is the middle of the control of vhdl source code

良好的Coding Style能减少Bug，减少锁存器出现的可能以及其他隐藏逻辑错误，也有助于减小芯片面积或所用资源(Good Coding Style can reduce Bug, reduce the possibility of latches and other hidden logic errors, and also help to reduce chip area or resources used.)

cordic算法的verilog 语言实现，注释详细，资料齐全，实现了cordic算法的各个功能，可以计算正余弦(cordic algorithm verilog language, detailed notes, and complete information)

Verilog HDL语言编写异步FIFO(Verilog HDL language, asynchronous FIFO)

三相电流滞环跟踪PWM逆变器。逆变电路负载电流与指令电流比较产生PWM波形。经验证可很好实现功能。(The three-phase hysteresis current tracking PWM inverter. Load current command current of the inverter circuit generating a PWM waveform. Proven functions well.)

说明：  基于OV7670采集，SDRAM缓存，sobel处理，VGA显示的工程，内有全部代码，基于QUARTUS开发板实现。 FPGA 边缘检测(Based on OV7670 acquisition, SDRAM cache, sobel processing, VGA display project, with all the code, based on QUARTUS development board. FPGA edge detection)

ad9957的资料，内含有命令字生成器，适合使用该芯片的开发人员(ad9957 data, contains the command word generator for developers using the chip)

RS编码器在fpga上的实现，用的modelsim开发环境(RS encoder in the realization of the fpga, development environment used in modelsim)

说明：  能实现输入0.5 1 5块钱的累加，然后对应购买的商品价格进行比较，显示找的钱数或错误灯(MY English is very good)