build a tv box on fpga cyclone 2

UART串口的verilog源代码，完全正确...........(UART serial Verilog source code, completely correct ...........)

说明：  实现基于黑金开发板的实时时钟功能，显示时分秒(Realize the real-time clock function based on black gold development board, display time, minute and second)

1路视频光端机的接收端，VHDL源码，使用全FPGA芯片的硬件，内建解帧、时钟、DESERDES-PDH a video of the receiving end, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES

说明：  这是一个带声音的弹球小游戏，通过VGA口显示，通过扩展口JA的 pin4和 pin GND输出声音， BTN3 BTN2 控制挡板左右移动，弹球和挡板都自带动画效果(This is a band sound pinball game, through the VGA port shows that through the expansion of the mouth of the JA and pin4 output pin GND voice, BTN3 BTN2 control baffle around Mobile, pinball and baffle all bring their own animation effects)

基本交通系统,实现城市交通路口的模拟仿真，自己的课程设计作品(Basic transport system, urban traffic junction simulation, design their own courses)

数字计时器，使用VHDL语言编写，使用数码管显示，精确到ms-digital timer, the use of VHDL development, the use of digital control, the precision of the ms

FPGA设计的指导原则，很经典的！希望给大家方便-FPGA design of the guiding principles, it is classic! Want to give everyone easy

可以实现DDC各个模块的功能，如内插、抽取、FIR滤波等功能(DDC can realize the function of each module, such as interpolation, extraction, FIR filtering)

FPGA to design in ECU, very help for engineer

十六进制计数器递增 ALTERA FPGA 板 7 段显示器上的每一秒。