This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Educati...

基于SOPC EP2C5开发板的I2C总线的A/D D/A例程-A/D AND D/A routings interfaced with i2c based on sopc ep2c5

基于Max+Plus II和VHDL的电子密码锁设计(Based on Max+ Plus II electronic lock and VHDL design)

这是一个GPIB源程序代码,里面有硬件相对应的代码-This is a GPIB source code, which corresponds to a hardware code

CPU代码-VHDL语言，实现了CPU的基本功能。-CPU code-VHDL language, the realization of the basic functions of the CPU.

在altera的FPGA平台上实现rs232串口的自收发通信，速率为115200波特率，PC机使用串口调试助手即可观察结果。包含全部代码与工程，本人亲自测试通过。(Realization of self transmitting and receiving communication serial port of RS232 In altera on the FPGA platform, at a rate of 115200 baud rate, PC using serial debugging assistant can be observed. Contains all the code and engineering, I personally tested by. )

quartusii 三分频电路，大家帮参考一下，有什么问题-one-third of quartusii frequency circuit, refer to U.S. help, have any problem

自己编的VHDL的波形发生器 做信号的可以-BOXING

应用背景弗鲁托PA oscilar就像联合国领导是卡瓦依，zholo罗该为什么我需要一个接着一个普通该estudielo为什么deberia darselo masticado关键技术zh0lo VHDL l0ks，就像PA presumir Y阙我书房一个接着一个普通免费，但四sintetiza Y有她comportamiento寺特拉华入伍机构sincronizar O把一osiclar DOS LED

自己用verilog编写的urisc程序，调试成功，压缩包里有仿真图像，值得学习参考。(Written in verilog urisc program debugging, simulation image compression bag, worth learning reference.)

一篇关于FIFO设计以及FPGA设计的文章-FIFO 1 on the design and FPGA design article