FPGA development board to write the Verilog code: function is from the client co...

Verilog HDL教程 什么是Verilog HDL？ Verilog HDL 硬件描述语言(What is a Verilog HDL tutorials Verilog HDL? Verilog HDL hardware description language)

基于VHDL语言的基带线路码产生电路设计（毕业论文），内涵完整的源代码(Based on VHDL language baseband line code generation circuit design (Thesis), meaning the complete source code)

自适应均衡器

说明：  本书纸版由机械工业出版社于2014年出版，张强编著，电子版由华章分社（北京华章图文信息有限公司）全球范围内制作与发行(The book was published in paperback by China machine press in 2014, and edited by zhang qiang. The electronic version was produced and distributed worldwide by huazhang branch (Beijing huazhang graphic information co., LTD.))

RS 编码和解码Verilog Code, 实现了RS（204,188)的编码和译码；(RS Coding and Decoding Verilog code，　implement RS（204,188) )

verilog编写的32位浮点加法器-32-bit Floating Point Addition Written in Verilog

AMBA设计和AHP桥梁SoC解决方案和测试策略。它是利用Xilinx和SIM模式和综合结果表明握手的两个通信协议 之间更好的预测。的设计示出了在有效的面积和速度方面。

基于FPGA的利用rom进行查询的方式生成一个频率为10KHZ的sin信号，编译成功，并实现功能仿真。(Query based on the the FPGA use of rom generate a frequency of 10 kHz sin signal, compiled successfully and to achieve functional simulation.)

采用VHDL英特尔8085微处理器的设计

VHDL数字系统设计工程实践，包含实验的原理，真值表和结构图描述，以及相关的VHDL代码。-VHDL digital system design engineering practice, including the principle of the experiment, truth table and chart descriptions, and associated VHDL code.