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ALU
包含一个ALU,实现斐波那契数列的计算。1.接受两个6位二进制输入。2.通过手动输入的时钟驱动每个周期进行一次计算。3.结果输出到led灯(使用NEXYS4开发板)(Including an ALU to realize the calculation of Fibonacci sequence. 1. Accept two 6-bit binary inputs. 2. Each cycle is driven by a clock input manually. 3. Output to LED lamp (using NEXYS4 development board))
- 2019-04-11 14:14:50下载
- 积分:1
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FPGA
基于FPGA的I2C程序0001,很不错的论文及程序,,大家快下啊-FPGA-based procedures I2C 0001, a very good paper and procedures, we quickly under ah
- 2022-08-17 00:37:15下载
- 积分:1
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二
两路十字路口的交通灯控制的VHDL源码,毕业设计,-Two-way traffic lights at the crossroads of the VHDL source code control, graduation design,
- 2022-04-18 12:48:42下载
- 积分:1
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And the string conversion of the code is relying on the synchronization state ma...
这个并串转换代码是依靠同步状态机来实现其控制的。其实并串转换在实际的电路中使用还是比较多的,尤其在通信线路方面的复用和分解方面,原理上就是一个串并转换和并串转换的过程。举个简单的例子,计算机串口发送数据的过程,如果满足发送条件了,其实就是一个并串转换的过程了。好了,废话不说,看代码就是。
-And the string conversion of the code is relying on the synchronization state machine to achieve its control. In fact, string conversion circuit in the actual use of, or more, particularly in the area of communication lines and the decomposition of reuse, the principle is a string and the conversion and the conversion process and string. Here is a simple example, the computer serial port of the process of sending data, if sent to meet the conditions, but in fact is a process of conversion and a string. Well, do not talk nonsense, look at the code is.
- 2022-03-29 17:46:13下载
- 积分:1
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一个用VerilogHDL语言编写的模6的二进制计数器
一个用VerilogHDL语言编写的模6的二进制计数器-a Verilog HDL language used in the preparation of the six-binary counter
- 2022-03-22 05:41:51下载
- 积分:1
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VHDL digital system design and engineering practice, one that contains principle...
VHDL数字系统设计和工程实践2,包含原理,真值表和原理图,以及VHDL源代码.-VHDL digital system design and engineering practice, one that contains principles, truth table and schematic, as well as VHDL source code.
- 2022-02-11 12:04:45下载
- 积分:1
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Optimised_OMP
一种压缩感知信号恢复算法,针对贪婪迭代类算法中的正交匹配追踪(OMP)算法的改进。OMP在每次迭代过程中选择出的原子并不是最优的,无法使本轮迭代中残差的减少最大化。本例程实现了改进的最优OMP算法,即Optimised_OMP,保证每次迭代选出的原子与已选出的原子序列所构成的平面正交,因而可以使残差下降的更快,从而加速算法收敛。(A compressed sensing signal recovery algorithms track (OMP) algorithm and orthogonal matching algorithm greedy iterative class. The OMP selected atoms in each iteration of the process is not optimal, not be able to maximize the reduction of the residual in the current round of iteration. The routines to achieve the optimal OMP algorithm improvements that Optimised_OMP, to ensure that each iteration selected atoms with atomic sequence elected a plane orthogonal, and thus can make the residuals have declined even faster, thus speeding up the algorithm convergence.)
- 2021-03-08 10:19:29下载
- 积分:1
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vhd语言编写交通灯
本代码来自老师指导,自己编写,可以修改交通灯的时间
- 2022-12-15 17:30:09下载
- 积分:1
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arbiter_ip
Arbiter code for simulation purpose
- 2013-07-13 17:45:11下载
- 积分:1
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spi_test
基于fpga的spi通信测试 可与stm32进行spi通信测试(SPI communication test based on FPGA can test SPI communication with stm32)
- 2020-06-20 21:00:01下载
- 积分:1