本代码是实现了lwip协议栈,可以移植到其他类型的嵌如式操作系统上

本模块的功能是验证实现和PC机进行基本的串口通信的功能。需要在PC机上安装一个串口调试工具来验证程序的功能。程序实现了一个收发一帧10个bit（即无奇偶校验位）的串口控 //制器，10个bit是1位起始位，8个数据位，1个结束 //位。串口的波特律由程序中定义的div_par参数决定，更改该参数可以实 //现相应的波特率。程序当前设定的div_par 的值是0x145，对应的波特率是 //9600。用一个8倍波特率的时钟将发送或接受每一位bit的周期时间 //划分为8个时隙以使通信同步. //程序的工作过程是：串口处于全双工工作状态，按动key1，FPGA向PC发送“21 EDA" //字符串（串口调试工具设成按ASCII码接受方式）；PC可随时向FPGA发送0-F的十六进制 //数据，FPGA接受后显示在7段数码管上。 //视频教程适合我们21EDA电子的所有学习板(this is a base vhdl for uart progarm.)

8通道同步AD芯片7608的FPGA控制程序(FPGA control program of ad7608(8 channel synchronous AD chip))

rebuild file in check for

The term web server can refer to either the hardware (the computer) or the software (the computer application) that helps to deliver web content that can be accessed through the Internet.(web server)

四位全家器的VHDL语言模块，已经在ISE8.1上经过测试通过-family of four VHDL modules, has been tested on ISE8.1 through

《VHDL程序设计教程》光盘使用说明 本光盘是邢建平和曾繁太所著《VHDL程序设计教程》一书的配书光盘。本光盘的著作权归作者所有。 清华大学出版社享有该光盘的中文简体版专有出版权。 本光盘包括如下目录： “e_teaching_vhdl”--CAI教学材料 包含全套的PowerPoint文件，可以直接用于教学，具体请参见该目录中的index.pps文件说明。 共包含前言、第一章到第六章的教学文件。目前包含的为中文版辅助材料。 “vhdl fortextboot”--教程代码 包含本书教程例子的所有代码。 “vhdl for lab”--教程实验部分代码 包含本书教程实验部分所有代码。 “vhdl solutions”--教程习题参考解答 包含本书教程习题参考解答的文档。 “class music”--课间休息音乐欣赏 包含课间休息的中外音乐欣赏。 ("VHDL Programming Guide" CD-ROM for use This disc is too SENSORS and Tseng Fan book "VHDL Programming Guide," a book with the book CD. Of the copyright of the CD-ROM of all. Tsinghua University Press entitled The Simplified Chinese version of the CD exclusive copyright. This CD includes the following directories: "E_teaching_vhdl"- CAI teaching materials Contains the full set of PowerPoint files can be directly used in teaching, specifically refer to the directory index.pps documentation. Contains a total of introduction, the first chapter to the sixth chapter of the teaching file. Currently contained in the supplementary material for the Chinese version. "Vhdl fortextboot"- Tutorial code Tutorial examples include all of the code book. "Vhdl for lab"- Tutorial test sections of code Experimental part of the tutorial contains all the code book. "Vhdl solutions"- solutions for reference Tutorial exercises Reference bo)

这是个vhdl编写的16bit的加减法器-This is vhdl prepared by the modified instruments used in the 16bit

这个是vhdl中很常见的jk filpflop的文件只用于很小数位的变化 其中的jk文件是up down运算都符合的(This is a very common vhdl jk filpflop file is only used for very small changes in a digital file which jk is up down operations are met)

Simple I2C controller -- 1) No multimaster -- 2) No slave mode -- 3) No fifo s -- -- notes: -- Every command is acknowledged. Do not set a new command before previous is acknowledged. -- Dout is available 1 clock cycle later as cmd_ack -Simple I2C controller-- 1) No multimaster-- 2) No slave mode-- 3) No fifo"s---- notes :-- Every command is acknowledged. Do not set a ne w command before previous is acknowledged.-- D is available out a clock cycle later as cmd_ack

基于sopc技术的数字均衡器带通滤波器及12864液晶显示-Sopc technology-based digital equalizer band-pass filter and liquid crystal display 12864